| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2024-05-08 | drm/amd/display: Refactor input mode programming for DIG FIFO |   Dillon Varone | 1 | -0/+1 |
| 2022-07-25 | drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding |   Michael Strauss | 1 | -2/+5 |
| 2021-02-22 | drm/amd/display: Synchronize displays with different timings |   Vladimir Stempen | 1 | -0/+5 |
| 2019-03-19 | drm/amd/display: Keep clocks high before seamless boot done |   Anthony Koo | 1 | -1/+1 |
| 2019-02-06 | drm/amd/display: interface to check if timing can be seamless | Anthony Koo | 1 | -0/+4 |
| 2019-01-14 | drm/amd/display: Use 100 Hz precision for pipe pixel clocks |   Ken Chalmers | 1 | -4/+4 |
| 2018-09-10 | drm/amd/display: remove unused clk_src code |   Dmytro Laktyushkin | 1 | -4/+0 |
| 2017-09-26 | drm/amd/display: add display write back(DWB) |   Duke Du | 1 | -0/+4 |
| 2017-09-26 | drm/amd/display: HDMI YCbCr422 12bpc pixel format issue |   Charlene Liu | 1 | -1/+1 |
| 2017-09-26 | drm/amd/dc: Add dc display driver (v2) |   Harry Wentland | 1 | -0/+178 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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