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path: root/drivers/gpu/drm/i915/display/intel_cx0_phy.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2025-02-19drm/i915/display: Allow display PHYs to reset power stateMika Kahola1-0/+1
2025-01-23drm/i915/cx0_phy: Use HDMI PLL algorithm for C10 PHYAnkit Nautiyal1-1/+0
2024-10-30drm/i915/cx0: convert to struct intel_displayJani Nikula1-3/+3
2024-10-30drm/i915/cx0: remove unnecessary includesJani Nikula1-2/+0
2024-05-30drm/i915/display: Add compare config for MTL+ platformsMika Kahola1-4/+4
2024-03-21drm/i915/cx0: remove the unused intel_is_c10phy()Jani Nikula1-2/+0
2024-03-21drm/i915/display: add intel_encoder_is_*() and _to_*() functionsJani Nikula1-0/+1
2023-11-13drm/i915/mtl: C20 state verificationMika Kahola1-1/+1
2023-10-29drm/i915/display: Abstract C10/C20 pll calculationLucas De Marchi1-4/+2
2023-10-29drm/i915/display: Abstract C10/C20 pll hw readoutLucas De Marchi1-3/+5
2023-10-07drm/i915: Simplify snps/c10x DPLL state checker calling convetionVille Syrjälä1-1/+2
2023-10-07drm/i915: Constify the snps/c10x PLL state checkersVille Syrjälä1-1/+1
2023-09-26drm/i915/cx0: prefer forward declarations over includesJani Nikula1-6/+8
2023-06-28drm/i915: Remove prototype for intel_cx0_phy_ddi_vswing_sequence()Gustavo Sousa1-3/+0
2023-04-28drm/i915/mtl: Power up TCSSMika Kahola1-0/+4
2023-04-28drm/i915/mtl: Readout Thunderbolt HW stateMika Kahola1-1/+1
2023-04-28drm/i915/mtl: Enabling/disabling sequence Thunderbolt pllMika Kahola1-3/+4
2023-04-28drm/i915/mtl: C20 port clock calculationMika Kahola1-0/+2
2023-04-28drm/i915/mtl: Dump C20 pll hw stateMika Kahola1-0/+2
2023-04-28drm/i915/mtl: C20 HW readoutMika Kahola1-2/+6
2023-04-14drm/i915/mtl: Add C10 phy programming for HDMIRadhakrishna Sripada1-0/+1
2023-04-14drm/i915/mtl: Add vswing programming for C10 physMika Kahola1-0/+2
2023-04-14drm/i915/mtl: Add Support for C10 PHY message bus and pll programmingRadhakrishna Sripada1-0/+34
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