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path: root/drivers/gpu/drm/i915/display/skl_watermark.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2023-05-24drm/i915: Convert INTEL_INFO()->display to a pointerMatt Roper1-4/+4
2023-04-04drm/i915/wm: split out SKL+ watermark regs to a separate fileJani Nikula1-0/+1
2023-03-31drm/i915/psr: Implement Display WA #1136Jouni Högander1-5/+0
2023-03-31drm/i915/psr: Implement Wa_14015648006Jouni Högander1-2/+5
2023-03-25drm/i915: Add i915.enable_sagv modparamVille Syrjälä1-0/+4
2023-03-10drm/i915: Reject wm levels that exceed vblank timeVille Syrjälä1-2/+116
2023-03-10drm/i915: Extract skl_wm_latency()Ville Syrjälä1-14/+26
2023-03-06drm/i915: remove unnecessary intel_pm.h includesJani Nikula1-1/+0
2023-02-16drm/i915: Copy highest enabled wm level to disabled wm levels for gen >= 9Stanislav Lisovskiy1-11/+15
2023-02-15drm/i915/wm: add .get_hw_state to watermark funcsJani Nikula1-2/+9
2023-02-15drm/i915/wm: move remaining watermark code out of intel_pm.cJani Nikula1-5/+6
2023-02-10drm/i915: Replace wm.max_levels with wm.num_levels and use it everywhereVille Syrjälä1-32/+30
2023-02-10drm/i915: Populate wm.max_level for everyoneVille Syrjälä1-0/+5
2023-02-01drm/i915: Expose SAGV state via debugfsVille Syrjälä1-5/+26
2023-02-01drm/i915: Introduce HAS_SAGV()Ville Syrjälä1-3/+3
2023-02-01drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabledVille Syrjälä1-1/+2
2023-01-30drm/i915: implement async_flip mode per plane trackingAndrzej Hajda1-0/+4
2022-12-08drm/i915/wm: switch to intel_de_* register accessors in display codeJani Nikula1-24/+18
2022-11-03drm/i915: Use intel_crtc_needs_modeset() moreVille Syrjälä1-1/+1
2022-10-03drm/i915: Simplify modifier lookup in watermark codeVille Syrjälä1-19/+3
2022-10-03drm/i915: Fix watermark calculations for DG2 CCS+CC modifierVille Syrjälä1-2/+4
2022-10-03drm/i915: Fix watermark calculations for DG2 CCS modifiersVille Syrjälä1-2/+6
2022-10-03drm/i915: Fix watermark calculations for gen12+ CCS+CC modifierVille Syrjälä1-2/+4
2022-10-03drm/i915: Fix watermark calculations for gen12+ MC CCS modifierVille Syrjälä1-2/+4
2022-10-03drm/i915: Fix watermark calculations for gen12+ RC CCS modifierVille Syrjälä1-2/+4
2022-09-30drm/i915: Add some debug prints for intel_modeset_all_pipes()Ville Syrjälä1-1/+1
2022-09-14drm/i915/mtl: Update MBUS_DBOX creditsRadhakrishna Sripada1-6/+42
2022-09-13drm/i915/ipc: use intel_uncore_rmw() to enable/disableJani Nikula1-10/+2
2022-09-13drm/i915/display: move IPC under display wm sub-structJani Nikula1-3/+3
2022-09-13drm/i915/ipc: register debugfs only if IPC availableJani Nikula1-3/+3
2022-09-13drm/i915/ipc: move IPC debugfs to skl_watermark.cJani Nikula1-0/+61
2022-09-13drm/i915/ipc: refactor and rename IPC functionsJani Nikula1-11/+14
2022-09-12drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailboxRadhakrishna Sripada1-1/+7
2022-09-09drm/i915: Use REG_FIELD_GET() to extract skl+ wm latenciesVille Syrjälä1-14/+8
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä1-0/+3470
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