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path: root/drivers/gpu/drm/i915/gt/intel_workarounds.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-08-30drm/i915/ats-m: Add thread execution tuning settingMatt Roper1-0/+9
2022-08-30Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709"Matt Roper1-1/+1
2022-08-26drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuningMatt Roper1-2/+0
2022-08-16drm/i915/dg2: Add additional tuning settingsMatt Roper1-9/+18
2022-08-16drm/i915/gt: Add dedicated function for non-ctx register tuning settingsMatt Roper1-14/+28
2022-08-02drm/i915/dg2: Add Wa_1509727124Harish Chegondi1-0/+7
2022-07-12drm/i915/dg2: Add Wa_15010599737Matt Roper1-0/+3
2022-07-01drm/i915/pvc: Implement w/a 16016694945Gustavo Sousa1-0/+3
2022-06-17drm/i915/gt: Cleanup interface for MCR operationsMatt Roper1-4/+4
2022-06-17drm/i915/gt: Move multicast register handling to a dedicated fileMatt Roper1-0/+1
2022-06-15drm/i915/pvc: Add recommended MMIO settingMatt Roper1-0/+9
2022-06-09drm/i915/pvc: Add register steeringMatt Roper1-0/+16
2022-06-08drm/i915/xehp: Correct steering initializationMatt Roper1-2/+2
2022-06-08drm/i915: More PVC+DG2 workaroundsMatt Roper1-7/+17
2022-06-07drm/i915/dg2: Correct DSS check for Wa_1308578152Matt Roper1-1/+1
2022-06-07drm/i915/dg2: Add Wa_14015795083Anshuman Gupta1-0/+3
2022-06-02drm/i915/sseu: Disassociate internal subslice mask representation from uapiMatt Roper1-14/+10
2022-05-31drm/i915/pvc: Add initial PVC workaroundsStuart Summers1-9/+52
2022-05-19drm/i915/dg2: Add workaround 22014600077Swathi Dhanavanthri1-0/+10
2022-05-10drm/i915/pvc: Define MOCS table for PVCAyaz A Siddiqui1-6/+24
2022-04-20drm/i915/dg2: Add workaround 18019627453José Roberto de Souza1-0/+4
2022-03-30drm/i915/dg2: Add Wa_22014226127José Roberto de Souza1-0/+5
2022-03-18drm/i915/dg2: Add preemption changes for Wa_14015141709Akeem G Abodunrin1-1/+1
2022-03-15drm/i915: Report steering details in debugfsMatt Roper1-1/+7
2022-03-04drm/i915/xehp: Support platforms with CCS engines but no RCSMatt Roper1-1/+1
2022-03-02drm/i915/xehpsdv: Move render/compute engine reset domains related workaroundsSrinivasan Shanmugam1-13/+13
2022-03-02drm/i915/xehp: Add compute workaroundsMatt Roper1-0/+47
2022-02-25drm/i915/dg2: add Wa_14014947963Clint Taylor1-0/+5
2022-02-25Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin1-6/+8
2022-02-23Merge tag 'drm-intel-gt-next-2022-02-17' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-nextRodrigo Vivi1-14/+25
2022-02-17drm/i915/dg2: Move misplaced 'ctx' & 'gt' wa's to engine wa listSrinivasan Shanmugam1-27/+35
2022-02-16drm/i915/gt: Use parameterized RING_MI_MODEMatt Roper1-3/+3
2022-02-02drm/i915: Move GT registers to their own header fileMatt Roper1-0/+1
2022-02-01drm/i915: Introduce G12 subplatform of DG2Matt Roper1-1/+1
2022-01-31Merge drm/drm-next into drm-intel-nextRodrigo Vivi1-46/+456
2022-01-31drm/i915/dg2: s/engine->i915/i915/ for engine workaroundsMatt Roper1-15/+15
2022-01-28drm/i915/dg2: Add Wa_14015227452Matt Roper1-0/+5
2022-01-24drm/i915/dg2: Add Wa_18018781329Matt Roper1-0/+6
2022-01-11drm/i915/gt: Move engine registers to their own headerMatt Roper1-0/+1
2022-01-11drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7Matt Roper1-1/+1
2022-01-11drm/i915: Use RING_PSMI_CTL rather than per-engine macrosMatt Roper1-1/+1
2022-01-11drm/i915: Parameterize ECOSKPDMatt Roper1-1/+1
2021-12-17drm/i915/gt: Use to_gt() helperMichał Winiarski1-1/+1
2021-12-03drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()Raviteja Goud Talla1-9/+9
2021-12-01drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelistingJosé Roberto de Souza1-1/+5
2021-12-01Revert "drm/i915: Implement Wa_1508744258"José Roberto de Souza1-7/+0
2021-11-15drm/i915: Don't read query SSEU for non-existent slice 0 on old platformsMatt Roper1-2/+9
2021-11-11drm/i915/dg2: Program recommended HW settingsMatt Roper1-1/+25
2021-11-11drm/i915/dg2: Add initial gt/ctx/engine workaroundsMatt Roper1-3/+275
2021-11-11drm/i915/xehpsdv: Add initial workaroundsStuart Summers1-12/+82
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