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path: root/drivers/gpu/drm/msm/adreno/a4xx.xml.h (follow)
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2024-04-22drm/msm: drop A3xx and A4xx headersDmitry Baryshkov1-4379/+0
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A3xx and A4xx headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585869/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-14-4bdb277a85a1@linaro.org
2024-02-26drm/msm/adreno: Update generated headersRob Clark1-82/+100
This updates the GPU headers to latest from mesa, using gen_header.py (which is used to generate headers at bulid time for mesa), rather than headergen2 (which doesn't have proper support for A6XX vs A7XX register variants). Mostly just uninteresting churn, but there are a couple spots in a7xx paths which update REG_A6XX_foo to REG_A7XX_foo for registers which are a7xx specific. Cc: Connor Abbott <cwabbott0@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/574880/
2023-03-21drm/msm: Update generated headersRob Clark1-13/+25
It's been a bit overdue. Regen headers to pull in a2xx perfcntr updates, etc. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/527926/ Link: https://lore.kernel.org/r/20230320185416.938842-2-robdclark@gmail.com
2022-03-04drm/msm: Update generated headersRob Clark1-19/+93
Update headers from mesa commit: commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef Author: Rob Clark <robclark@freedesktop.org> AuthorDate: Wed Mar 2 17:11:10 2022 -0800 freedreno/registers: Add a couple regs we need for kernel Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221> Signed-off-by: Rob Clark <robdclark@chromium.org> [for display bits:] Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20220304005317.776110-2-robdclark@gmail.com
2021-06-23drm/msm: Generated register updateRob Clark1-19/+19
Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31drm/msm: sync generated headersRob Clark1-44/+81
We haven't sync'd for a while.. pull in updates to get definitions for some fields in pkt7 payloads. Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2018-12-11drm/msm: update generated headersRob Clark1-5/+5
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm: update generated headersRob Clark1-4/+4
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10drm/msm: update generated headersRob Clark1-23/+170
Resync generated headers to pull in a6xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-06-16drm/msm: update generated headersRob Clark1-14/+52
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-11-28drm/msm: update generated headersRob Clark1-31/+80
Pull in a5xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: update generated headersRob Clark1-62/+1205
Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm: update generated headersRob Clark1-5/+10
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15drm/msm: update generated headersRob Clark1-9/+197
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: update generated headersRob Clark1-26/+394
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-02-01drm/msm: update generated headersRob Clark1-132/+288
Resync from rnndb database, to pull in register defines for: * eDP * HDMI/HDCP * mdp4/mdp5 YUV support * mdp5 hw cursor support Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: update generated headersRob Clark1-0/+2144
Signed-off-by: Rob Clark <robdclark@gmail.com>
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