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WireGuard for the Linux kernel
Jason A. Donenfeld
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path:
root
/
drivers
/
net
/
wireless
/
realtek
/
rtw89
/
pci.h
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Age
Commit message (
Expand
)
Author
Files
Lines
2024-04-03
wifi: rtw89: 8852c: disable PCI PHY EQ to improve compatibility
Ping-Ke Shih
1
-0
/
+8
2024-04-03
wifi: rtw89: 8852c: add quirk to set PCI BER for certain platforms
Ping-Ke Shih
1
-0
/
+5
2024-03-05
wifi: rtw89: update suspend/resume for different generation
Chin-Yen Lee
1
-0
/
+3
2024-03-05
wifi: rtw89: update DMA function with different generation
Chin-Yen Lee
1
-0
/
+27
2024-02-27
wifi: rtw89: pci: implement PCI CLK/ASPM/L1SS for WiFi 7 chips
Chin-Yen Lee
1
-0
/
+30
2024-02-01
wifi: rtw89: pci: enlarge RX DMA buffer to consider size of RX descriptor
Ping-Ke Shih
1
-1
/
+1
2024-02-01
wifi: rtw89: pci: validate RX tag for RXQ and RPQ
Ping-Ke Shih
1
-1
/
+3
2024-01-10
wifi: rtw89: pci: use DBI function for 8852AE/8852BE/8851BE
Chin-Yen Lee
1
-0
/
+1
2023-12-07
wifi: rtw89: 8922a: dump MAC registers when SER occurs
Chia-Yuan Li
1
-0
/
+4
2023-11-14
wifi: rtw89: pci: correct interrupt mitigation register for 8852CE
Ping-Ke Shih
1
-0
/
+8
2023-11-14
wifi: rtw89: 8922ae: add v2 interrupt handlers for 8922AE
Ping-Ke Shih
1
-0
/
+102
2023-11-14
wifi: rtw89: pci: generalize interrupt status bits of interrupt handlers
Ping-Ke Shih
1
-0
/
+62
2023-11-14
wifi: rtw89: pci: add pre_deinit to be called after probe complete
Ping-Ke Shih
1
-0
/
+12
2023-11-14
wifi: rtw89: pci: stop/start DMA for level 1 recovery according to chip gen
Zong-Zhe Yang
1
-0
/
+4
2023-11-14
wifi: rtw89: pci: reset BDRAM according to chip gen
Zong-Zhe Yang
1
-0
/
+9
2023-11-08
wifi: rtw89: pci: implement PCI mac_post_init for WiFi 7 chips
Ping-Ke Shih
1
-0
/
+44
2023-11-08
wifi: rtw89: pci: add LTR v2 for WiFi 7 chip
Ping-Ke Shih
1
-0
/
+1
2023-11-08
wifi: rtw89: pci: implement PCI mac_pre_init for WiFi 7 chips
Ping-Ke Shih
1
-0
/
+71
2023-11-08
wifi: rtw89: pci: use gen_def pointer to configure mac_{pre,post}_init and clear PCI ring index
Ping-Ke Shih
1
-0
/
+28
2023-11-08
wifi: rtw89: pci: add PCI generation information to pci_info for each chip
Ping-Ke Shih
1
-0
/
+6
2023-10-30
wifi: rtw89: pci: generalize code of PCI control DMA IO for WiFi 7
Ping-Ke Shih
1
-0
/
+1
2023-10-30
wifi: rtw89: pci: add new RX ring design to determine full RX ring efficiently
Ping-Ke Shih
1
-0
/
+1
2023-10-30
wifi: rtw89: pci: define PCI ring address for WiFi 7 chips
Ping-Ke Shih
1
-0
/
+75
2023-10-30
wifi: rtw89: 8922ae: add 8922AE PCI entry and basic info
Ping-Ke Shih
1
-0
/
+91
2023-05-11
wifi: rtw89: pci: fix interrupt enable mask for HALT C2H of RTL8851B
Zong-Zhe Yang
1
-0
/
+1
2023-04-14
wifi: rtw89: add function to wait for completion of TX skbs
Po-Hao Huang
1
-2
/
+2
2023-01-16
wifi: rtw89: fix assignation of TX BD RAM table
Zong-Zhe Yang
1
-6
/
+9
2022-11-08
wifi: rtw89: update D-MAC and C-MAC dump to diagnose SER
Chia-Yuan Li
1
-0
/
+12
2022-09-28
wifi: rtw89: pci: add to do PCI auto calibration
Ping-Ke Shih
1
-0
/
+3
2022-09-28
wifi: rtw89: add DMA busy checking bits to chip info
Ping-Ke Shih
1
-1
/
+8
2022-09-28
wifi: rtw89: pci: mask out unsupported TX channels
Ping-Ke Shih
1
-0
/
+1
2022-09-19
wifi: rtw89: pci: concentrate control function of TX DMA channel
Chin-Yen Lee
1
-2
/
+12
2022-09-19
wifi: rtw89: correct enable functions of HCI/PCI DMA
Chin-Yen Lee
1
-5
/
+0
2022-09-02
wifi: rtw89: pci: enable CLK_REQ, ASPM, L1 and L1ss for 8852c
Chin-Yen Lee
1
-0
/
+12
2022-09-02
wifi: rtw89: pci: fix PCI PHY auto adaption by using software restore
Chia-Yuan Li
1
-2
/
+27
2022-05-30
rtw89: pci: handle hardware watchdog timeout interrupt status
Ping-Ke Shih
1
-0
/
+1
2022-04-24
rtw89: ps: access TX/RX rings via another registers in low power mode
Ping-Ke Shih
1
-0
/
+16
2022-04-24
rtw89: pci: add variant RPWM/CPWM to enter low power mode
Ping-Ke Shih
1
-0
/
+5
2022-04-24
rtw89: pci: add variant IMR/ISR and configure functions
Ping-Ke Shih
1
-0
/
+123
2022-04-06
rtw89: pci: add L1 settings
Ping-Ke Shih
1
-0
/
+7
2022-04-06
rtw89: pci: add deglitch setting
Ping-Ke Shih
1
-0
/
+3
2022-04-06
rtw89: pci: add LTR setting for v1 chip
Ping-Ke Shih
1
-0
/
+3
2022-04-06
rtw89: pci: refine pci pre_init function
Chia-Yuan Li
1
-0
/
+16
2022-04-06
rtw89: pci: add pci attributes to configure operating mode
Ping-Ke Shih
1
-0
/
+114
2022-04-06
rtw89: pci: add register definition to rtw89_pci_info to generalize pci code
Ping-Ke Shih
1
-0
/
+68
2022-04-06
rtw89: pci: support variant of fill_txaddr_info
Ping-Ke Shih
1
-0
/
+33
2022-04-06
rtw89: ser: control hci interrupts on/off by state
Zong-Zhe Yang
1
-0
/
+1
2022-03-10
rtw89: pci: use a struct to describe all registers address related to DMA channel
Ping-Ke Shih
1
-5
/
+1
2022-03-10
rtw89: pci: add V1 of PCI channel address
Ping-Ke Shih
1
-0
/
+67
2022-03-10
rtw89: pci: add struct rtw89_pci_info
Ping-Ke Shih
1
-0
/
+3
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