| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2018-10-15 | dt-bindings: clock: samsung: Add SPDX license identifiers |   Krzysztof Kozlowski | 1 | -5/+2 |
| 2015-10-24 | clk: samsung: exynos5250: Add DISP1 clocks |   Tomeu Vizoso | 1 | -1/+3 |
| 2015-07-24 | clk: exynos5250: add cpu clock configuration data and instantiate cpu clock |   Thomas Abraham | 1 | -0/+1 |
| 2014-07-26 | clk: samsung: trivial: Correct typo in author's name |   Tomasz Figa | 1 | -1/+1 |
| 2014-05-26 | clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks |   Cho KyongHo | 1 | -0/+16 |
| 2014-05-14 | clk: samsung: exynos5250: Add clocks for G3D |   Arun Kumar K | 1 | -1/+3 |
| 2014-05-14 | clk: samsung: exynos5250/5420: Add gate clock for SSS module |   Naveen Krishna Chatradhi | 1 | -0/+1 |
| 2014-01-08 | clk: exynos5250: add clock ID for div_pcm0 |   Andrew Bresticker | 1 | -0/+1 |
| 2014-01-08 | ARM: exynos5250: create a DT header defining CLK IDs |   Andrzej Hajda | 1 | -0/+159 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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