wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2019-03-22	clk: samsung: dt-bindings: Add ADC clock ID to Exynos5410	Krzysztof Kozlowski	1	-0/+1
2019-03-22	clk: samsung: dt-bindings: Put CLK_UART3 in order	Krzysztof Kozlowski	1	-1/+1
2018-10-15	dt-bindings: clock: samsung: Add SPDX license identifiers	Krzysztof Kozlowski	1	-5/+2
2016-09-09	clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks	Sylwester Nawrocki	1	-0/+3
2016-06-02	dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410	Krzysztof Kozlowski	1	-0/+2
2016-06-01	dt-bindings: clock: Add TMU clock ID to Exynos5410	Krzysztof Kozlowski	1	-0/+1
2016-05-30	dt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410	Krzysztof Kozlowski	1	-0/+9
2016-05-30	dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410	Krzysztof Kozlowski	1	-0/+10
2016-05-30	dt-bindings: clock: Add license and reformat Exynos5410 clock IDs	Krzysztof Kozlowski	1	-22/+32
2014-05-31	clk: exynos5410: register clocks using common clock framework	Tarek Dakhran	1	-0/+33