wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2020-06-10	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-2/+2
2020-05-12	clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210	Joseph Lo	1	-2/+2
2020-05-12	dt-bindings: clock: tegra: Add clock ID for CSI TPG clock	Sowjanya Komatineni	1	-1/+1
2020-05-12	dt-bindings: clock: tegra: Remove PMC clock IDs	Sowjanya Komatineni	1	-7/+7
2020-02-17	dt-bindings: clock: tegra: Add IDs for OSC clocks	Sowjanya Komatineni	1	-1/+3
2019-11-11	clk: tegra: Reimplement SOR clocks on Tegra210	Thierry Reding	1	-3/+3
2019-11-11	clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC	Thierry Reding	1	-1/+0
2019-10-29	dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT	Thierry Reding	1	-1/+2
2018-03-08	clk: tegra: Add la clock for Tegra210	Peter De Schrijver	1	-1/+1
2017-11-16	Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc	Linus Torvalds	1	-0/+1
2017-11-02	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	Greg Kroah-Hartman	1	-0/+1
2017-10-17	dt-bindings: clock: tegra: Add sor1_out clock	Thierry Reding	1	-0/+1
2017-04-04	clk: tegra: Add missing Tegra210 clocks	Peter De Schrijver	1	-8/+8
2017-03-20	clk: tegra: Add aclk	Peter De Schrijver	1	-0/+2
2017-03-20	clk: tegra: Define Tegra210 DMIC sync clocks	Peter De Schrijver	1	-1/+8
2017-03-20	clk: tegra: Add CEC clock	Peter De Schrijver	1	-1/+1
2017-03-20	clk: tegra: Fix ISP clock modelling	Peter De Schrijver	1	-2/+2
2016-06-17	clk: tegra: Enable sor1 and sor1_src on Tegra210	Thierry Reding	1	-1/+1
2016-04-28	clk: tegra: Fix pllre Tegra210 and add pll_re_out1	Rhyland Klein	1	-1/+1
2016-02-02	clk: tegra: Add the APB2APE audio clock on Tegra210	Jon Hunter	1	-1/+1
2015-11-16	clk: tegra: Add Tegra210 device tree binding	Thierry Reding	1	-0/+401