| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2020-05-12 | dt-bindings: clock: tegra: Remove PMC clock IDs |   Sowjanya Komatineni | 1 | -7/+7 |
| 2020-02-17 | dt-bindings: clock: tegra: Add IDs for OSC clocks | Sowjanya Komatineni | 1 | -1/+3 |
| 2017-11-02 | License cleanup: add SPDX GPL-2.0 license identifier to files with no license |   Greg Kroah-Hartman | 1 | -0/+1 |
| 2017-03-20 | clk: tegra: Add CEC clock |   Peter De Schrijver | 1 | -1/+1 |
| 2013-12-11 | clk: tegra: remove bogus PCIE_XCLK |   Stephen Warren | 1 | -1/+1 |
| 2013-11-26 | ARM: tegra30: add missing CLK IDs | Peter De Schrijver | 1 | -1/+9 |
| 2013-05-28 | ARM: tegra30: create a DT header defining CLK IDs |   Hiroshi Doyu | 1 | -0/+265 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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