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2024-02-27ASoC: meson: axg-fifo: use FIELD helpersJerome Brunet1-12/+10
Use FIELD_GET() and FIELD_PREP() helpers instead of doing it manually. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://msgid.link/r/20240227150826.573581-1-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-26ASoC: meson: axg-fifo: take continuous ratesJerome Brunet1-2/+6
The rate of the stream does not matter for the fifos of the axg family. Fifos will just push or pull data to/from the DDR according to consumption or production of the downstream element, which is the DPCM backend. Drop the rate list and allow continuous rates. The lower and upper rate are set according what is known to work with the different backends This allows the PDM input backend to also use continuous rates. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://msgid.link/r/20240223175116.2005407-6-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-08-14ASoC: meson: merge DAI call back functions into opsKuninori Morimoto1-2/+2
ALSA SoC merges DAI call backs into .ops. This patch merge these into one. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87zg319m7m.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-27ASoC: meson: Migrate to new style legacy DAI naming flagCharles Keepax1-0/+3
Change the legacy DAI naming flag from opting in to the new scheme (non_legacy_dai_naming), to opting out of it (legacy_dai_naming). These drivers appear to be on the CPU side of the DAI link and currently uses the legacy naming, so add the new flag. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220623125250.2355471-17-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-28ASoC: meson: axg-toddr: fix channel order on g12 platformsJerome Brunet1-1/+23
On g12 and following platforms, The first channel of record with more than 2 channels ends being placed randomly on an even channel of the output. On these SoCs, a bit was added to force the first channel to be placed at the beginning of the output. Apparently the behavior if the bit is not set is not easily predictable. According to the documentation, this bit is not present on the axg series. Set the bit on g12 and fix the problem. Fixes: a3c23a8ad4dc ("ASoC: meson: axg-toddr: add g12a support") Reported-by: Nicolas Belin <nbelin@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20200828151438.350974-1-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-18ASoC: meson: axg-fifo: fix fifo threshold setupJerome Brunet1-12/+9
On TODDR sm1, the fifo threshold register field is slightly different compared to the other SoCs. This leads to the fifo A being flushed to memory every 8kB. If the period is smaller than that, several periods are pushed to memory and notified at once. This is not ideal. Fix the register field update. With this, the fifos are flushed every 128B. We could still do better, like adapt the threshold depending on the period size, but at least it consistent across the different SoC/fifos Fixes: 5ac825c3d85e ("ASoC: meson: axg-toddr: add sm1 support") Reported-by: Alden DSouza <aldend@google.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20191218172420.1199117-2-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-11ASoC: meson: Drop superfluous ioctl PCM opsTakashi Iwai1-3/+0
ASoC PCM core deals the empty ioctl field now as default. Let's kill the redundant lines. Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20191210145406.21419-11-tiwai@suse.de Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-08ASoC: meson: remove snd_pcm_opsKuninori Morimoto1-3/+21
snd_pcm_ops is no longer needed. Let's use component driver callback. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87muej90e4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05ASoC: meson: axg-toddr: add sm1 supportJerome Brunet1-0/+68
On sm1, the maximum number TODDR inputs is extended to 16. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-8-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05ASoC: meson: axg-toddr: expose all 8 inputsJerome Brunet1-8/+7
The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-05ASoC: meson: axg-toddr: add g12a supportJerome Brunet1-0/+53
Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-13ASoC: meson: axg-toddr: add support for spdifin backendJerome Brunet1-10/+5
add IEC958_SUBFRAME_LE to the list of format accepted by the fifo frontend. As opposed to what was initially noted in the toddr dai driver, the spdifin does not place the msb at bit 28, it just output a whole spdif subframe. Placing the msb at bit 28 in the toddr driver just filters out the parity, user, channel status and validity bits. It is better to just provide the whole spdif subframe to the userspace and let the iec958 plugin deal with it. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-18ASoC: meson: add axg toddr driverJerome Brunet1-0/+199
Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>