diff options
author | jsg <jsg@openbsd.org> | 2020-06-22 10:02:42 +0000 |
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committer | jsg <jsg@openbsd.org> | 2020-06-22 10:02:42 +0000 |
commit | 1d56c77f65eaaffc3cb009d5d6d9e106b2ba069b (patch) | |
tree | 2af47d1742fde0673bfab27b503202a00e4e3545 /sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c | |
parent | Rework checks for `pppx_ifs' tree modification. (diff) | |
download | wireguard-openbsd-1d56c77f65eaaffc3cb009d5d6d9e106b2ba069b.tar.xz wireguard-openbsd-1d56c77f65eaaffc3cb009d5d6d9e106b2ba069b.zip |
drm/amd/display: dmcu wait loop calculation is incorrect in RV
From Paul Hsieh
11bce5915166fd50a395716755db8c6a3d3f2eb0 in linux 5.7.y/5.7.5
7fc5c319efceaed1a23b7ef35c333553ce39fecf in mainline linux
Diffstat (limited to '')
-rw-r--r-- | sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c index 97b7f32294f..c320b7af7d3 100644 --- a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c +++ b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c @@ -97,9 +97,6 @@ int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_di VBIOSSMC_MSG_SetDispclkFreq, requested_dispclk_khz / 1000); - /* Actual dispclk set is returned in the parameter register */ - actual_dispclk_set_mhz = REG_READ(MP1_SMN_C2PMSG_83) * 1000; - if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) { if (clk_mgr->dfs_bypass_disp_clk != actual_dispclk_set_mhz) |