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author | patrick <patrick@openbsd.org> | 2020-02-10 12:41:34 +0000 |
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committer | patrick <patrick@openbsd.org> | 2020-02-10 12:41:34 +0000 |
commit | 137e484d139b6ba6884a8f96d53823822777ac35 (patch) | |
tree | 7513c3ff606bfd70b17655d3cc994b6429d64126 /usr.sbin/sasyncd | |
parent | When attempting to disabe TSX avoid uninitialised var use for Intel cpus (diff) | |
download | wireguard-openbsd-137e484d139b6ba6884a8f96d53823822777ac35.tar.xz wireguard-openbsd-137e484d139b6ba6884a8f96d53823822777ac35.zip |
Add support for the RK3399's VOP clocks to rkclock(4).
The main VOP DCLK clocks either have a normal divisor as a parent
or some fractional one. The clock referred in the device tree to
set the frequency on is the mux itself, which has no divisor. To
To be able to set the frequency, we need to allow setting it on the
parent anyway. Thus move the divisor mask check to a later point,
so even though we have no divisor, we can still tell the parent to
adjust itself.
ok kettenis@
Diffstat (limited to 'usr.sbin/sasyncd')
0 files changed, 0 insertions, 0 deletions