diff options
Diffstat (limited to 'gnu/llvm/lib/CodeGen/RegisterScavenging.cpp')
| -rw-r--r-- | gnu/llvm/lib/CodeGen/RegisterScavenging.cpp | 45 |
1 files changed, 26 insertions, 19 deletions
diff --git a/gnu/llvm/lib/CodeGen/RegisterScavenging.cpp b/gnu/llvm/lib/CodeGen/RegisterScavenging.cpp index fc5105aadbf..97967124add 100644 --- a/gnu/llvm/lib/CodeGen/RegisterScavenging.cpp +++ b/gnu/llvm/lib/CodeGen/RegisterScavenging.cpp @@ -16,30 +16,33 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/RegisterScavenging.h" - +#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" +#include "llvm/CodeGen/LiveRegUnits.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/TargetFrameLowering.h" +#include "llvm/CodeGen/TargetInstrInfo.h" +#include "llvm/CodeGen/TargetRegisterInfo.h" +#include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/MC/MCRegisterInfo.h" -#include "llvm/PassSupport.h" +#include "llvm/Pass.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetFrameLowering.h" -#include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Target/TargetRegisterInfo.h" -#include "llvm/Target/TargetSubtargetInfo.h" #include <algorithm> #include <cassert> #include <iterator> #include <limits> #include <string> +#include <utility> using namespace llvm; @@ -210,7 +213,7 @@ void RegScavenger::forward() { continue; if (!isRegUsed(Reg)) { // Check if it's partial live: e.g. - // D0 = insert_subreg D0<undef>, S0 + // D0 = insert_subreg undef D0, S0 // ... D0 // The problem is the insert_subreg could be eliminated. The use of // D0 is using a partially undef value. This is not *incorrect* since @@ -285,8 +288,8 @@ bool RegScavenger::isRegUsed(unsigned Reg, bool includeReserved) const { unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RC) const { for (unsigned Reg : *RC) { if (!isRegUsed(Reg)) { - DEBUG(dbgs() << "Scavenger found unused reg: " << TRI->getName(Reg) << - "\n"); + DEBUG(dbgs() << "Scavenger found unused reg: " << printReg(Reg, TRI) + << "\n"); return Reg; } } @@ -460,7 +463,7 @@ RegScavenger::spill(unsigned Reg, const TargetRegisterClass &RC, int SPAdj, MachineBasicBlock::iterator &UseMI) { // Find an available scavenging slot with size and alignment matching // the requirements of the class RC. - const MachineFunction &MF = *Before->getParent()->getParent(); + const MachineFunction &MF = *Before->getMF(); const MachineFrameInfo &MFI = MF.getFrameInfo(); unsigned NeedSize = TRI->getSpillSize(RC); unsigned NeedAlign = TRI->getSpillAlignment(RC); @@ -533,7 +536,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, MachineBasicBlock::iterator I, int SPAdj) { MachineInstr &MI = *I; - const MachineFunction &MF = *MI.getParent()->getParent(); + const MachineFunction &MF = *MI.getMF(); // Consider all allocatable registers in the register class initially BitVector Candidates = TRI->getAllocatableSet(MF, RC); @@ -558,15 +561,15 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, // If we found an unused register there is no reason to spill it. if (!isRegUsed(SReg)) { - DEBUG(dbgs() << "Scavenged register: " << TRI->getName(SReg) << "\n"); + DEBUG(dbgs() << "Scavenged register: " << printReg(SReg, TRI) << "\n"); return SReg; } ScavengedInfo &Scavenged = spill(SReg, *RC, SPAdj, I, UseMI); Scavenged.Restore = &*std::prev(UseMI); - DEBUG(dbgs() << "Scavenged register (with spill): " << TRI->getName(SReg) << - "\n"); + DEBUG(dbgs() << "Scavenged register (with spill): " << printReg(SReg, TRI) + << "\n"); return SReg; } @@ -595,10 +598,10 @@ unsigned RegScavenger::scavengeRegisterBackwards(const TargetRegisterClass &RC, ScavengedInfo &Scavenged = spill(Reg, RC, SPAdj, SpillBefore, ReloadBefore); Scavenged.Restore = &*std::prev(SpillBefore); LiveUnits.removeReg(Reg); - DEBUG(dbgs() << "Scavenged register with spill: " << PrintReg(Reg, TRI) - << " until " << *SpillBefore); + DEBUG(dbgs() << "Scavenged register with spill: " << printReg(Reg, TRI) + << " until " << *SpillBefore); } else { - DEBUG(dbgs() << "Scavenged free register: " << PrintReg(Reg, TRI) << '\n'); + DEBUG(dbgs() << "Scavenged free register: " << printReg(Reg, TRI) << '\n'); } return Reg; } @@ -769,13 +772,16 @@ void llvm::scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS) { } namespace { + /// This class runs register scavenging independ of the PrologEpilogInserter. /// This is used in for testing. class ScavengerTest : public MachineFunctionPass { public: static char ID; + ScavengerTest() : MachineFunctionPass(ID) {} - bool runOnMachineFunction(MachineFunction &MF) { + + bool runOnMachineFunction(MachineFunction &MF) override { const TargetSubtargetInfo &STI = MF.getSubtarget(); const TargetFrameLowering &TFL = *STI.getFrameLowering(); @@ -792,9 +798,10 @@ public: return true; } }; -char ScavengerTest::ID; } // end anonymous namespace +char ScavengerTest::ID; + INITIALIZE_PASS(ScavengerTest, "scavenger-test", "Scavenge virtual registers inside basic blocks", false, false) |
