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2020-06-18Now that the calls to stoeplitz_cache_entry() are out of the way, we cantb1-38/+9
2020-06-18Check control types and skip unknown ones.ratchov1-2/+9
2020-06-18Allow names to start with digits or underscoresratchov1-12/+8
2020-06-18Don't try to open device that's already openratchov5-38/+76
2020-06-18Document sioctl_desc structure maxval attributeratchov1-5/+19
2020-06-18Fix comments about sioctl_desc's maxval fieldratchov1-3/+3
2020-06-18The next step is to use that we have cached the result of the matrixtb1-45/+49
2020-06-17Fix broken HID descriptors of Elecom trackballs.bru4-4/+99
2020-06-17Print CPU name and cache info in the same way as we do on arm64.kettenis2-7/+95
2020-06-17Manually tag the section option.schwarze1-2/+3
2020-06-17Fix length check in ca_getreq().tobhe1-5/+14
2020-06-17More pmap bits, mostly from powerpc andd arm64.kettenis2-19/+492
2020-06-17Instead of performing three distinct allocations per created pipe,anton2-52/+57
2020-06-17Explicitly unmap DMA memory using pmap_kremove(9).kettenis1-1/+2
2020-06-17We are no longer using the "keep" file as a flag.florian1-3/+1
2020-06-17needs param.h, not types.hderaadt1-2/+2
2020-06-17Document that rand() returns non-deterministic random numbers unless atim1-3/+12
2020-06-17Expose SMR list and pointer macros to userspace. This enables the usevisa1-3/+3
2020-06-17ddb(4); be explicit that the parameter to trace /t uses the radixsthen1-2/+4
2020-06-17Remove the bus specific sc_ih (interrup handle) variable and use the commonclaudio3-20/+17
2020-06-17put pci_intr_establish_cpu() in, but commented out for now.dlg1-4/+25
2020-06-17Let iwx(4) firmware decide which Tx rate to use.stsp2-7/+309
2020-06-17Attach secondary CPUs early. Since on most machine we need psci(4) tokettenis1-4/+21
2020-06-17mark up an argument with Fa, not Vadlg1-7/+5
2020-06-17have a go at documenting pci_intr_map_msix.dlg1-3/+29
2020-06-17replace a long and wrapped Fn line with Fo Fa Fcdlg1-4/+10
2020-06-17if the chip did rss, use the hash from the chip as an mbuf flowid.dlg2-2/+8
2020-06-17make ph_flowid in mbufs 16bits by storing whether it's set in csum_flags.dlg12-54/+51
2020-06-17Remove some of the unnecessary complications in the calculation of thetb1-24/+21
2020-06-17enable multiple queues (and interrupts on multiple cpus) on vmx(4).dlg2-33/+53
2020-06-17tweak previous;jmc1-3/+3
2020-06-17add a dumb pci_intr_establish_cpu().dlg2-2/+16
2020-06-17pci_intr_establish_cpu() for establishing an interrupt no a specific cpu.dlg6-18/+37
2020-06-17syncderaadt1-0/+2
2020-06-17wire intrmap into the builddlg1-1/+3
2020-06-17make intrmap_cpu return a struct cpu_info *, not a "cpuid number" thing.dlg3-14/+14
2020-06-17use atomic_set() in kref_init()jsg1-2/+2
2020-06-17kref_sub() interface was removed from linux and is unusedjsg1-8/+1
2020-06-17add pci_intr_msix_count(), to get the msi-x table size for a device.dlg2-3/+22
2020-06-17sparc64 should define __HAVE_PCI_MSIXdlg2-2/+48
2020-06-17use WRITE_ONCE and READ_ONCE for set and readjsg1-6/+6
2020-06-17manpage for the bits of intrmap we're using at the moment.dlg2-2/+128
2020-06-17add intrmap, an api that picks cpus for devices to attach interrupts to.dlg2-0/+385
2020-06-17Do not do logical negation of a bitshifted field.mortimer1-2/+2
2020-06-16make intr_barrier run sched_barrier on the cpu the interrupt pinned to.dlg1-3/+4
2020-06-16Remove old commented out line and fix indent.mortimer1-3/+2
2020-06-16Some simplifications.kettenis1-50/+90
2020-06-16Add missing dependeny.kettenis1-2/+2
2020-06-16Fix strlcpy() size parameter in refldbld(), it was a byte too small.millert2-17/+21
2020-06-16typosnaddy1-5/+5
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