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* sortjsg2021-02-271-5/+5
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* regenjsg2021-02-272-32/+312
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* add ids for Intel Xeon Scalablejsg2021-02-271-7/+63
| | | | | | | | | | | | | | | Used by at least Skylake-SP (SKX) and Cascade Lake-SP (CLX). Covers Xeon Scalable, Xeon D, Xeon W, Core Extreme/Core X product families. The Scalable parts are marketed as Xeon Bronze, Silver, Gold and Platinum. As most of these ids are not described in public documents from Intel use Skylake-ESystem.inf and KabyLakePCH-HSystem.inf from Intel's Windows drivers to get an idea of what the names should be. With the name for 0x2088 found in a Intel authored Linux driver. Initial patch and much discussion from Karel Gardas.
* put the mac addr into a uint64_t to compare it to the ethernet slow addr.dlg2021-02-271-5/+9
| | | | also do the ethertype comparison before the conversion above.
* Check session, window, pane in the right order when working out format type.nicm2021-02-261-5/+5
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* Set RTF_GATEWAY for flow routes, not for host route.tobhe2021-02-261-3/+3
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* Fix and improve handling of address families in vroute_getcloneroute().tobhe2021-02-261-27/+9
| | | | ok patrick@
* Ship resolvd service, enable it by defaultkn2021-02-263-3/+15
| | | | | | Starting right after unwind. OK deraadt
* Ignore SIGHUPkn2021-02-261-0/+3
| | | | | | It should always run and there is no reload semantic. OK deraadt
* sync; OK deraadtflorian2021-02-262-0/+6
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* Create /var/db/dhcpleased for lease files.florian2021-02-261-1/+3
| | | | OK deraadt@
* rc(8) bits for dhcpleased(8).florian2021-02-264-7/+19
| | | | OK deraadt
* Hook up dhcpleased to the build.florian2021-02-262-7/+7
| | | | OK deraadt
* Sort SEE ALSO and fix its punctuation.tb2021-02-261-3/+3
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* Import dhcpleased(8) - a dhcp daemon to acquire IPv4 address leasesflorian2021-02-2621-0/+5265
| | | | | | | | | | | | | | | | | | | | | from servers. dhcpleased(8) follows the well known three process design of all our privsep daemons. It uses pledge(2) and unveil(2) to restrict access further. In particular the "engine" process, responsible for parsing of untrusted data, is pledge'd "stdio". It cannot access the outside world nor the filesystem at all. Like slaacd(8) for IPv6 it will be always running and acquire addresses for all interface with the autoconf4 flag set. The flag can be set by "ifconfig $if inet autoconf" or by adding "inet autoconf" to /etc/hostname.if. An existing "dhcp" line should be removed. Various iterations tested by deraadt@ The hardest part, finding a name, was handled by jmatthew@ & otto@ "get to it :)" deraadt@
* Set is_trusted in x509_verify_ctx_add_chain()tb2021-02-261-2/+2
| | | | | | | | If we're about to add a chain we have a trust path, so we have at least one trusted certificate. This fixes a thinko from r1.31 and fixes the openssl(1) cms verify test. ok jsing (who had the same diff)
* zap spades of trailing whitespacetb2021-02-261-266/+266
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* Read and parse OTP on the BCM4378. There are quite a few firmware andpatrick2021-02-262-2/+138
| | | | | | | nvram files used for the different Apple devices. The device tree and the OTP hold the information which of those we will have to use. For now this information will simply be printed, but depending on how we choose to do the firmare distribution we could use it for loadfirmware().
* Attach to BCM4378.patrick2021-02-261-1/+2
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* Add support for BCM4378 as implemented on the Apple M1. This chip seemspatrick2021-02-262-26/+126
| | | | | | | | to use a different set of PCIE2REG registers. Accessing the "old" ones even leads to faults. There are two surprises though. One is that it seems that the interrupt status register always returns 0, and the other one is that we receive the interrupts way too early, but both can be worked around for now.
* touch pcidevs again to generated new rcs ids in headersjan2021-02-262-2/+2
| | | | advince from sthen@
* Only support #iommu-cells = <1> for now to make sure the correct stream IDkettenis2021-02-261-17/+8
| | | | | | is passed to the IOMMU device driver. ok patrick@
* Increase the amount of RX buffers given to the bwfm(4) chip. We haave seenpatrick2021-02-261-4/+4
| | | | | | this already on previous chips, which only started giving us packets when handing over at least 128 of them. Apparently some now require 256, which seems to get the Apple M1's WiFi going.
* Add aplcpie(4), a (minimal) driver for the PCIe host bridge on Apple M1 SoCs.kettenis2021-02-264-3/+505
| | | | ok patrick@
* Add missing PCI product IDs for x710 10GBase-T into ixl(4)jan2021-02-264-2/+9
| | | | OK phessler
* only store the current time on address table entries if it changes.dlg2021-02-261-3/+6
| | | | | | | | this avoids unecessary writes to memory. it helps a little bit with a single nettq, but we get a lot more of a boost in pps when running concurrently. thanks to hrvoje for testing.
* Add a couple of format variables for active and last window index.nicm2021-02-262-5/+35
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* Some more improvements from Joachim Wiberg's version of mg.lum2021-02-261-7/+10
| | | | | | | check before using variable in list remove unnecessary variable declaration check value of adjustname() add a '< 0' return value of snprintf
* syncderaadt2021-02-261-0/+5
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* remove this KEX fuzzer; it's awkward to use and doesn't play nicedjm2021-02-264-585/+1
| | | | | with popular fuzzing drivers like libfuzzer. AFAIK nobody has used it but me.
* remove some unused functions in slaacdjsg2021-02-261-46/+1
| | | | ok florian@
* tpmr can use the eth64 bits too.dlg2021-02-261-9/+5
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* try do a better job of filtering 802.1 reserved group addresses.dlg2021-02-261-3/+22
| | | | | | | | | if the bridge is supposed to carry vlan packets, assuming it's an s-vlan component and should allow certain group addresses to cross between "customer" bridges. i should probably let some of these groups fall back through to the calling ether_input rather than drop them.
* Fix Typo, ok jcadanj2021-02-261-2/+2
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* use uint64_ts for ethernet addresses in the src/dst bits of rules.dlg2021-02-261-26/+26
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* use a uint64_t for the ethernet address in the etherbridge table.dlg2021-02-265-58/+64
| | | | | | | | testing has shown up to a 30% improvement in the veb forwarding rate with this change. an earlier diff was tested by hrvoje popovski tested on amd64 and sparc64
* Some improvements from Joachim Wiberg's version of mg.lum2021-02-261-4/+8
| | | | | check value of adjustname() use int for return value of snprintf
* add some helpers for working with ethernet addresses as uint64_tdlg2021-02-262-2/+48
| | | | | | | | | | | | | | the main bits are ether_addr_to_e64 and ether_e64_to addr for loading an ethernet address into a uin64_t and visa versa. there's also some macros for testing if an address in a uint64_t is multicast, broadcast, anyaddr, or if it's an 802.1q reserved multicast group address. the reason for this functionality is once you have an ethernet address as a uint64_t, operations like compares, bit tests, and so on are fast and easy. tested on amd64 and sparc64
* Add my copyright since I added most of the contentdanj2021-02-261-2/+3
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* Increase the buffer size for the ioctl response buffers to the same aspatrick2021-02-262-7/+8
| | | | used in the wifi firmware to ensure responses can be received.
* a bit more debugging behind #ifdef DEBUG_SKdjm2021-02-261-2/+7
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* gcc is more strict about union declsderaadt2021-02-261-3/+3
| | | | ok dlg
* Indicate hostready signal to inform the firmware that the rings have beenpatrick2021-02-262-4/+18
| | | | initialized.
* Refactor bwfm(4) firmware loading. The PCIe backend will need to be ablepatrick2021-02-264-130/+129
| | | | | | | to load the CLM blob like the SDIO backend already does. Additionally it is also helpful for the PCIe backend to try a file named after the device tree compatible. Thus refactor the SDIO code and make it available for both SDIO and PCIe.
* Fix prio2fifo mapping table.patrick2021-02-261-5/+5
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* The firmware replaces the last 32-bit on RAM with a shared DRAM address.patrick2021-02-251-2/+8
| | | | | | | While the for-loop checks that thie value has changed since we wrote to it, the timeout-condition checked for non-zero, which is wrong. This means that we didn't realize the firmware wasn't started. While there, make sure the shared DRAM address is inside the chip's address space.
* Some newer chips have two D11/802.11 cores, and we need to reset both atpatrick2021-02-252-5/+38
| | | | the same time.
* Support for version 7 of the bwfm(4) PCIe interface. The size of the itemspatrick2021-02-252-5/+7
| | | | | on the rx/tx complete rings has increased slightly to accomodate possible new features.
* Add some infrastructure in the PCI chipset tag for pci_probe_device_hook()patrick2021-02-2510-12/+81
| | | | | | so that we can provide IOMMU-hooked bus DMA tags for each PCI device. ok kettenis@
* mention that FIX_CRLF_FILES is rooted in WRKDIST, pointed out by espie@.sthen2021-02-251-1/+3
| | | | mention that shell wildcards may be used.