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2020-04-04Make libcxxabi provide __register_frame, _Unwind_Backtrace and friendsjca1-1/+1
on sparc64 Discrepancy spotted in http://build-failures.rhaalovely.net/sparc64/2020-04-03/devel/llvm,,-main.log Input from gkoehler@, ok kettenis@ deraadt@
2020-04-04Fix powerpc libunwind for cpus without altivec.gkoehler3-19/+41
Defer saving the altivec registers until we need to access them (like how arm defers saving the VFP registers). This prevents a SIGILL on a G3 cpu when code throws a C++ exception. ok kettenis@
2019-06-17Merge libc++, libc++abi and libunwind version 8.0.0.patrick10-90/+1017
Ports build by naddy@ Tested by visa on octeon Tested by kettenis on macppc and sparc64
2019-06-17Import libunwind 8.0.0.patrick6-11/+526
2019-03-13Initial IP-based caching implementation with O(logn) lookup.pirofti2-1/+67
Caching implemented via red-black trees, this can be improved and further work is on-going to bring it closer to GNU's performance that uses a LRU-MRU 8-entries based caching algorithm. Prompted by robert@ who run into a runtime of an executed macro of 5 minutes in libreoffice. With this the execution is reduced to 58 seconds. C++11 tips from espie@, rsadowski@ Tested by robert@ OK mortimer@, kettenis@.
2019-02-08Convert powerpc assembly code into something clangs internal assemblerkettenis3-241/+241
understands. ok mpi@, visa@
2019-02-04Merge libc++, libc++abi and libunwind version 7.0.1.patrick7-300/+712
Tested by visa on octeon Tested by kettenis on arm64, armv7 and sparc64 "go for it" deraadt and sthen
2019-02-04Import libunwind 7.0.1patrick5-16/+40
2019-02-03Turns out I botched the previous commit. While making the %o7 + 8 bitkettenis1-2/+2
consistent across the various low-level interfaces that handle the instruction pointer, reality turns out to be a bit more subtle. On SPARC, DWARF2 uses r15 (which maps to %o7) as the return address column. This means that we should not add/subtract 8 when it reads/updates the register state while processing DWARF2 instructions. That in turn means that getIP() and setIP() should not have been changed in my previous commit. ok visa@
2019-02-03On SPARC, the return address is %o7 + 8.kettenis2-5/+5
ok guenther@, deraadt@, patrick@, dlg@, visa@
2018-10-21Backport libunwind hardware floating point handling for mips64.visa4-15/+385
Upstream reference: https://reviews.llvm.org/D41968 OK kettenis@
2018-09-16Adjust sparc64 bits after libunwind 6.0.0 update.kettenis1-1/+1
ok visa@
2018-09-11merge libunwind 6.0.0; ok patrick@, kettenis@robert10-513/+2259
2018-09-11import of libunwind 6.0.0robert12-308/+479
2017-04-18Add sparc64 support.kettenis7-0/+273
2016-09-20When _LIBUNWIND_ARM_EHABI is defined, include <link.h> to get thekettenis1-0/+1
dl_unwind_find_exidx prototype. ok guenther@
2016-09-18Go down the right path in the _LIBUNWIND_ARM_EHABI case.kettenis1-1/+1
ok patrick@
2016-09-05In some cases, for instance for statically linked binaries, our binutilspatrick2-2/+11
does not produce the binary table which is used for optimization. libunwind currently depends on having that table. This changes libunwind to fall back to the default search code when the binary table is not available. ok kettenis@
2016-09-05Implement OpenBSD support in libc++ and libunwind.patrick1-1/+1
ok kettenis@
2016-09-03Import libunwind 3.9.0patrick22-0/+10810