| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-06-03 | let the random subsystem read the tsc for event "timestamps". |   dlg | 1 | -2/+10 |
| 2020-05-31 | introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c. | dlg | 1 | -1/+3 |
| 2020-04-28 | Use the same inittodr()/resettodr() implementation as on arm64/armv7/sparc64 |   kettenis | 1 | -1/+2 |
| 2020-04-15 | Remove unused protoype. | kettenis | 1 | -2/+1 |
| 2019-12-20 | Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL. |   jsg | 1 | -3/+2 |
| 2019-08-09 | Add TSC synchronization for multiprocessor machines. |   pirofti | 1 | -1/+4 |
| 2019-05-17 | Mitigate Intel's Microarchitectural Data Sampling vulnerability. |   guenther | 1 | -1/+5 |
| 2019-05-12 | Delete cpu_idle_{enter,leave}_fcn() as unused. Add RETGUARD checks to | guenther | 1 | -3/+1 |
| 2019-01-19 | Add a pwraction sysctl that controls what the power button does on acpi. |   tedu | 1 | -2/+4 |
| 2018-12-05 | Include srp.h where struct cpu_info uses srp to avoid erroring out when | jsg | 1 | -1/+2 |
| 2018-08-21 | Perform mitigations for Intel L1TF screwup. There are three options: |   deraadt | 1 | -1/+2 |
| 2018-07-11 | Declare cpu_meltdown in <machine/cpu.h> | guenther | 1 | -1/+2 |
| 2018-07-06 | Split trap() into kerntrap() and usertrap(), with all the signal generation | guenther | 1 | -2/+2 |
| 2018-06-19 | SMT (Simultanious Multi Threading) implementations typically share | kettenis | 1 | -2/+2 |
| 2018-06-05 | Switch from lazy FPU switching to semi-eager FPU switching: track whether | guenther | 1 | -7/+3 |
| 2018-05-26 | Initialize ci_idle_pcb->pcb_cr0 just once, in cpu_attach(). | guenther | 1 | -3/+1 |
| 2018-05-23 | Move CR4_DEFAULT to specialreg.h where the CR4_* values are defined | guenther | 1 | -9/+1 |
| 2018-03-29 | Explicitly declare the gdt storage in struct cpu_info_full instead of | guenther | 1 | -2/+2 |
| 2018-02-21 | Meltdown: implement user/kernel page table separation. | guenther | 1 | -7/+22 |
| 2018-01-07 | Add identcpu.c and specialreg.h definitions for the new Intel/AMD MSRs |   mlarkin | 1 | -1/+3 |
| 2017-10-23 | Expose TSC properties via sysctl nodes |   mikeb | 1 | -2/+6 |
| 2017-10-17 | Add a machine-independent implementation for the mplock. |   visa | 1 | -1/+2 |
| 2017-10-06 | Recalibrate TSC timecounter with HPET and PM timer | mikeb | 1 | -2/+1 |
| 2017-08-11 | apmwarn and the ridiculous apmhalt hack sysctls are not relevant here | tedu | 1 | -5/+3 |
| 2017-07-12 | remove CPU_LIDSUSPEND/machdep.lidsuspend |   natano | 1 | -3/+2 |
| 2017-06-20 | SVM: better cleanbits handling. Fixes an issue on Bulldozer CPUs causing | mlarkin | 1 | -1/+3 |
| 2017-04-14 | SVM: calculate max ASID value and save for later use. This will be used in | mlarkin | 1 | -1/+2 |
| 2017-03-16 | Typo, from miod@ |   mpi | 1 | -2/+2 |
| 2017-03-11 | Introduce a new knob to force the first USB keyboard as console input. | mpi | 1 | -2/+4 |
| 2017-03-02 | Add a new sysctl machdep.lidaction. The sysctl works as follows: | natano | 1 | -2/+4 |
| 2016-12-14 | Add the TSC timecounter and use it on Skylake machines where the HPET |   reyk | 1 | -1/+2 |
| 2016-10-13 | Add an extra debug line when virtualization is disabled in the firmware. |   martijn | 1 | -1/+2 |
| 2016-09-30 | Compute CR3 target count. Needed for upcoming debugging diff. | mlarkin | 1 | -1/+2 |
| 2016-09-27 | read and cache VMFUNC capability during boot. for use in an upcoming diff | mlarkin | 1 | -1/+2 |
| 2016-09-04 | Introduce Dynamic Profiling, a ddb(4) based & gprof compatible kernel | mpi | 1 | -2/+2 |
| 2016-07-28 | Store the acpi processor ID/UID in struct cpu_info, and use it to attach | kettenis | 1 | -1/+2 |
| 2016-05-09 | 2nd identical definition of PROC_PC macro is not needed | deraadt | 1 | -6/+1 |
| 2015-12-06 | child_return() is already declared in <sys/proc.h> | guenther | 1 | -4/+1 |
| 2015-11-23 | No longer need 'option VMM', declaring the vmm0 device is sufficient. | deraadt | 1 | -5/+1 |
| 2015-11-13 | vmm(4) kernel code | mlarkin | 1 | -2/+51 |
| 2015-07-02 | introduce srp, which according to the manpage i wrote is short for | dlg | 1 | -1/+5 |
| 2015-06-28 | Force the return to userspace from execve to go through iretq to get all | guenther | 1 | -2/+1 |
| 2015-06-13 | Parse _CST objects and use the C-states they describe when they're sane. | guenther | 1 | -1/+2 |
| 2015-06-07 | Enable use of mwait in non-MP boxes and report # of C-substates up to C7, | guenther | 1 | -3/+7 |
| 2015-05-28 | Save the cpuid(6) eax bits in the cpu_info and report the SENSOR and ARAT | guenther | 1 | -1/+2 |
| 2015-05-18 | Do lazy update/reset of the FS.base and %[def]s segment registers: reseting | guenther | 1 | -1/+3 |
| 2015-04-18 | It seems that the CPUID lies about the monitor-line size, or at least our | kettenis | 1 | -3/+4 |
| 2015-01-15 | Don't include i82489 headers in cpu.h |   sf | 1 | -7/+1 |
| 2015-01-06 | when we're entering an interrupt handler, record its ipl so splassert | dlg | 1 | -1/+2 |
| 2014-12-16 | these headers do not need to (and should not) include lock.h poisoning | tedu | 1 | -2/+1 |
