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path: root/sys/arch/amd64/include/fpu.h
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2019-11-29Fix size of reserved bytes section in xsave header.mortimer1-2/+2
2018-10-07In vmm, handle xsetbv like xrstor: instead of trying to prevalidateguenther1-1/+2
2018-06-24Move signal generation from fputrap() to where it's called in trap()guenther1-2/+2
2018-06-05Switch from lazy FPU switching to semi-eager FPU switching: track whetherguenther1-19/+9
2018-05-26Update comment to reflect xsaveguenther1-5/+6
2017-04-27vmm(4): proper save/restore of FPU context during entry/exit.mlarkin1-1/+32
2015-03-25Save/restore AVX registers and other XSAVE-managed state information whenkettenis1-1/+3
2015-03-21Add support for saving/restoring FPU state using the XSAVE/XRSTOR. Limitkettenis1-1/+10
2011-03-23Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.pirofti1-4/+4
2011-03-20When reading MXCSR from userland sigcontext or a ptrace request,guenther1-1/+3
2010-11-20__attribute__((packed)) -> __packed. The ioprbs.c chunk was commented out, andmiod1-2/+2
2010-09-29Back out previous, it appears to be broken.joshe1-3/+1
2010-09-29When reading MXCSR from userland sigcontext, mask out invalid bits.joshe1-1/+3
2010-06-29fpu_kernel_{enter,exit}; Functions to allow the use ofthib1-2/+3
2006-10-01Switch fpu control word to the hardware default. This makes us use 64-bitkettenis1-23/+1
2004-02-28rename our NPXCW settingderaadt1-4/+4
2004-01-28an amd64 arch support.mickey1-0/+84