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* s/KHZ/kHz/ and reduce dmesg spam a bitkettenis2021-01-191-4/+4
| | | | ok tb@, deraadt@
* Use the full 32 bits for the miscellaneous armv7 timecounters.naddy2020-07-121-2/+2
| | | | | | | | | Checked against * ARM Architecture Reference Manual (agtimer) * ARM Cortex-A9 MPCore Technical Reference Manual (amptimer) * OMAP35x Applications Processor Technical Reference Manual (gptimer) Artturi Alm had independently suggested this in the past.
* Use MAXCPUS as the number of elements for the array of per-cpu data.kettenis2018-08-111-4/+2
| | | | ok jsg@, patrick@
* Remove a couple of unsused static inline functions. Also remove a compariskettenis2016-09-241-11/+1
| | | | | | of an array to a null pointer that is always false. Found with clang. ok jsg@
* Dynamically attach agtimer(4). Since agtimer(4) also provides the delay()kettenis2016-08-101-41/+51
| | | | | | | | | | function for platforms that have it, rework the code a bit such that it can be used before agtimer(4) attaches. Introduce a new agtimer_init() function that checks whether the CPU implements the Generic Timer feature and switches to agtimer_delay() if that feature is present. Call this function from the generic platform initialization code. ok jsg@
* Unmask the timer output signal for real.kettenis2016-08-051-3/+3
| | | | ok patrick@, jsg@
* comment typommcc2015-12-121-2/+2
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* Add some changes from Patrick Wildt in bitrig that are required to makejsg2015-06-061-8/+7
| | | | | | | | | the qemu cortex a15 useable without trustzone. Establish the interrupt for the non-secure physical timer (30), in addition to the secure physical timer (29). Stop masking the timer output signal in the interrupt handler.
* add some more cortex A idsjsg2015-05-291-2/+3
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* Remove unused bus space tags/handles. The generic timer uses the cp15jsg2015-05-291-11/+1
| | | | coprocessor space.
* Support for the ARM Generic Timer used in the Cortex-A7 and Cortex-A15.patrick2013-09-091-0/+408
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