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wireguard-openbsd
jd/histogram
jd/queueboosts
jd/simplify-queueing
master
WireGuard implementation for the OpenBSD kernel
Matt Dunwoodie
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sys
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arch
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arm64
/
include
/
cpu.h
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2020-06-05
Implement cpu_rnd_messybits() as a read of the virtual counter xored
naddy
1
-2
/
+11
2020-05-31
introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.
dlg
1
-1
/
+3
2020-05-17
Fix typo in comment.
kettenis
1
-2
/
+2
2020-05-17
Add machdep.compatible.
kettenis
1
-4
/
+8
2019-07-02
Register cpu(4) as a cooling device. This supports passive cooling by
kettenis
1
-1
/
+2
2019-06-04
Bump MAXCPUS to 32 so that we can use all cores on the Ampere eMAG.
patrick
1
-2
/
+2
2018-12-05
Include srp.h where struct cpu_info uses srp to avoid erroring out when
jsg
1
-1
/
+2
2018-08-11
Bump MAXCPUS from 8 to 24.
kettenis
1
-2
/
+2
2018-08-03
Implement DVFS support.
kettenis
1
-1
/
+5
2018-06-30
Add intr_enable() here as well.
kettenis
1
-1
/
+7
2018-06-28
Add ci_acpi_proc_id member to struct cpu_info; needed by acpi(4).
kettenis
1
-1
/
+2
2018-01-30
Add support for switching CPUs in ddb on arm64. Based on a diff from drahn@.
kettenis
1
-1
/
+9
2018-01-28
Spin up secondary CPUs and add IPI infrastructure. Heavily based on diffs
kettenis
1
-4
/
+27
2018-01-17
Defend agains branch predictor target injection (Spectre "variant 2")
kettenis
1
-1
/
+3
2018-01-12
Add MULTIPROCESSOR basics for arm64. Enough to build and run a kernel with
kettenis
1
-1
/
+5
2018-01-05
Make arm64 use the MI mplock implementation. Avoid <sys/mplock.h> being
kettenis
1
-10
/
+3
2017-12-30
Implement CPU_BUSY_CYCLE and intr_disable/restore.
kettenis
1
-1
/
+14
2016-12-17
Import of OpenBSD/arm64
patrick
1
-0
/
+264