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* enable mcx(4) on arm64, found in Packet's g2.large.arm servers.jmatthew2019-06-072-2/+4
| | | | tested by and ok patrick@
* Remove the unused pvh_attrs attribute from struct vm_page_md.patrick2019-06-041-4/+2
| | | | ok kettenis@
* Bump MAXCPUS to 32 so that we can use all cores on the Ampere eMAG.patrick2019-06-041-2/+2
| | | | ok kettenis@
* Map the raw bus space operations to the regular ones.patrick2019-06-031-1/+15
| | | | ok kettenis@
* Fix priorities of LIPs to match the other changes made in rev 1.17.kettenis2019-06-031-2/+2
| | | | | | Makes MSI/MSI-X actually work reliably on machines with agintc(4). ok patrick@
* Change pci_intr_handle_t into a struct and replace duplicated code thatkettenis2019-06-024-183/+102
| | | | | | | | implements mapping of MSI and MSI-X interrupts with new generic functions. Fixes a use-after-free in sone PCI device drivers that call pci_intr_string(9) after pci_intr_establish(9). ok deraadt@
* Refactor the MAP_STACK feature, and introduce another similar variation:deraadt2019-06-011-17/+4
| | | | | | | | | Lookup the address that a syscall instruction is executed from, and kill the process if that page is writeable. This brings an aspect of W^X behaviour to W|X mappings (in JITs not yet adapted to W^X). The goal is to remove simple attack methods and force use of ret2libc or other more complicated means. ok kettenis stefan visa
* Bump VM_MAX_KERNEL_ADDRESS so that we have about 16G of KVA. Sincepatrick2019-06-011-2/+2
| | | | | | | | | we need KVA to keep track of all the RAM pages, machines with a lot of memory easily exhaust our KVA space. We need about 1G of KVA per 32G of memory, so with 16G of KVA we can maintain close to 512G of memory. ok kettenis@
* On machines with large amounts of physical memory we fail to initialize uvmkettenis2019-06-012-13/+66
| | | | | | | | | | because we don't have enough kernel memory available in the early bootstrap phase to allocate the vm_page structures. Fix this by making uvm_growkernel() work before uvm is initialized like we do on other architectures that don't use a direct map and explicitly call it after enumerating the available physical memory with an estimate of how much KVA we need to initialize uvm. ok patrick@
* Recognise Cortex-A65.jsg2019-06-011-1/+4
| | | | ok kettenis@
* Deimos is Cortex-A77.kettenis2019-05-311-4/+4
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* Add MSI-X support.kettenis2019-05-311-30/+40
| | | | ok patrick@
* Add MSI-X support for acpipci(4). This splits out some generic code intokettenis2019-05-314-33/+134
| | | | | | | a new pci_machdep.c file such that it can be re-used by other arm64 PCI host bridge drivers in the future. ok patrick@
* On bigger arm64 machines with plenty of memory it is possible thatpatrick2019-05-284-15/+62
| | | | | | | | | | | | | | the kernel, which is allocated in low memory by efiboot, is not in the same 512 GiB L0 address space as the EFI/FDT/ACPI tables. Since we only identity-map a single L0 entry for bootstrapping purposes we can't reach those tables. Keep a set of spare L1 tables, currently one, which we can dynamically enter into the identity map so that we are able to reach those tables. While there, do the FDT mapping a bit later in C code by calling pmap_map_early(). This allows us to boot further on Packet's Ampere eMAGs. Discussed with drahn@ ok kettenis@
* Pass extent for prefetchable mmio. Since there is no distinction betweenkettenis2019-05-242-2/+4
| | | | | | | prefetchable and "normal" mmio at the host bridge level we can simply pass the same extent. ok patrick@
* Don't print "not conigured" messages for nodes that are disabled.kettenis2019-05-231-12/+13
| | | | ok patrick@
* Move idepth tracking out of interrupt controller into common layer.drahn2019-05-132-12/+7
| | | | 'looks good' kettenis@
* Add the needed ICC_PMR_EL1 register bit defines for the previouspatrick2019-05-131-2/+6
| | | | | | | commit to unbreak the build. from kettenis@ ok drahn@
* Between the broken GIC-500 on the RK3399 and differences in the secure modekettenis2019-05-121-44/+52
| | | | | | | | | | | | | configuration done by TF-A between boards we have to shift the priorities that we use for both the architected ICC_PMR_EL1 register and the memory mapped priority registers on the GIC in different ways. Make this explicit in the code and try to handle all the cases we care about. This includes QEMU and RK3399 boards that still use the TF-A version provided by Rockchip. Seems to make the rockpro64 run stable with a GENERIC kernel. ok drahn@, patrick@
* Add fusbtc(4) to support the Fairchild FUSB302 USB Type-C controller.patrick2019-05-112-2/+4
| | | | | | | | | | | | | | | | A Type-C controller has multiple tasks. Even though the orientation of the plug doesn't matter for the user, it matters for the hardware. To be able to know how to route the SuperSpeed pins you need to know which way the plug is connected. Also you need to know if you're a sink/source or device/host. To get the first connection, you toggle between the modes until you find a connection. In case you see that a sink is connected, you can turn on USB Vbus to power the sink. This driver explicitly does not implement USB's Type-C state machine, but if we get more and more of these controllers it might be worth doing. Also there's no support for Power Delivery messages yet. ok kettenis@
* Enable ucrcom(4) on all architectures that have uslcom(4).kettenis2019-05-081-1/+3
| | | | ok deraadt@
* Fix kernel compile with DEBUG_AGINTC.ccardenas2019-05-081-2/+1
| | | | ok phessler, deraadt
* Remove some junk that we don't use.kettenis2019-05-041-12/+1
| | | | ok patrick@
* Add a print function to mainbus(4) such that it prints unconfigured deviceskettenis2019-05-021-3/+52
| | | | | | just like we do for simplebus(4). ok patrick@, visa@
* Enable mvmdio(4) and mvneta(4) on arm64 as well. These are partpatrick2019-04-302-2/+6
| | | | of the Armada 3720 SoC as used on the Turris Mox.
* Add mvuart(4) to support the Armada 3720's serial console.patrick2019-04-303-3/+7
| | | | ok kettenis@
* Add a check to tftp_open() that we are actually opening a TFTP device.naddy2019-04-252-2/+16
| | | | | | | | | | When reading a file from a non-TFTP device, clear the bootmac variable to prevent the kernel from going into netboot mode. This allows loading a kernel from a disk device after having booted efiboot from PXE. style tweak and ok kettenis@
* Add support for ccp(4) at acpi(4).kettenis2019-04-232-2/+4
| | | | ok deraadt@
* Not all systems supporting DVFS expose a regulator to set the voltage.kettenis2019-04-221-5/+5
| | | | | | | | On such systems we should skip setting the voltage and just change the clock frequency. An example of such a system is the HiKey970 where firmware running on a microcontroller will transparently adjust the voltage. ok patrick@
* When entering kernel pages uncached we need to make sure to flush thepatrick2019-04-161-1/+3
| | | | | | | | caches. If the physical page was previously used by userland it is likely that this page is still in the cache and writing to the newly mapped page could result in unexpected behaviour. ok kettenis@
* Prevent attaching drivers to devices for which we attached a driver early.kettenis2019-04-162-4/+24
| | | | ok patrick@, dlg@, visa@
* Instead of using COPTS=-Oz (and similar) in make environment to forcederaadt2019-04-141-1/+2
| | | | | tightly-built ramdisk kernels, set the option in per-arch Makefile.inc based upon SMALL_KERNEL
* Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 tojsg2019-04-141-2/+4
| | | | | | | | | | | | | | | | | | | linux 4.19.34. Adds support for more Intel hardware: Broxton/Apollo Lake (was is_preliminary in 4.4) Amber Lake (another Kaby Lake refresh) Gemini Lake Coffee Lake Whiskey Lake Cannon Lake (though no hardware with Intel graphics ever shipped) Ice Lake (alpha support, hardware not released) This does not add support for new radeon hardware on the AMD side as newer radeons have a different kernel driver (amdgpu). Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for helping and a bunch of other developers for testing.
* crank versionsderaadt2019-04-101-2/+2
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* change marks[] array to uint64_t, so the code can track full 64-bitderaadt2019-04-102-4/+4
| | | | | details from the ELF header instead of faking it. Proposal from mlarkin, tested on most architectures already
* crank version; looks good deraadtflorian2019-04-081-2/+2
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* Add bwfm(4) such that we can use bsd.rd to update over wireless.kettenis2019-04-041-1/+2
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* imxdwusb(4) and imxpd(4) are no longer needed.patrick2019-04-012-6/+2
| | | | ok kettenis@
* fast track ddb> reboot command to skip anything which might panic again.tedu2019-04-011-1/+5
| | | | ok deraadt
* follow atf and change neoverse e1 part numberjsg2019-03-311-2/+2
| | | | matches trm which is now public
* Enable uxrcom(4).kettenis2019-03-281-1/+3
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* Use the debugger mutex for `ddb_mp_mutex'. This should prevent a racevisa2019-03-231-17/+16
| | | | | | | | | | that could leave `ddb_mp_mutex' locked if one CPU incremented `db_active' while another CPU was in the critical section. When the race hit, the debugger was unable to resume execution or switch between CPUs. Race analyzed by patrick@ OK mpi@ patrick@
* Remove FBSDID.kevlo2019-03-154-20/+4
| | | | ok deraadt@
* Setting and getting the rounding mode on our arm64 FPU has not workedpatrick2019-03-121-2/+3
| | | | | | | | | | | | | | in libm since the rounding mode is in fpcr, not fpsr. Since both FPU registers are 32-bit we can store them in the 64-bit fenv_t to make handling the bits easier. While there add FE_DENORMAL, which also exists on x86. Also make sure that whenever we are being passed an exception mask, we only allow the bits that are supported by hardware. Found by regression tests Debugged with Moritz Buhl ok kettenis@
* When accessing the child address cells make sure to use the size forpatrick2019-03-071-2/+2
| | | | | | those instead of the size of the parent address cells. ok kettenis@
* recognise more arm cpusjsg2019-02-231-1/+13
| | | | ok patrick@
* Cortex A76 is not affected by spectre variant 2 branch target injectionjsg2019-02-211-1/+2
| | | | | attacks described in CVE-2017-5715 and ATF does not implement a workaround for Cortex A76.
* Sprinkle a few ifdefs for _LOCORE and _KERNEL and reorder a few linespatrick2019-02-161-21/+26
| | | | | | | so that pmap.h can be included as part of the mmap_hint regression test. From Moritz Buhl ok bluhm@
* revert revert revert. there are many other archs that use custom allocs.tedu2019-02-101-3/+3
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* missed a file. add flags to the pool page free function.tedu2019-02-101-3/+3
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