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path: root/sys/arch/i386/include
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2020-05-31introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg1-1/+3
2020-05-27Retire <machine/varargs.h>.visa1-58/+0
2020-05-25Kill unused cdev_pc_init().mpi1-10/+1
2020-05-13Kill biospoll/pctrpoll defines and use `seltrue' directly in cdev_*_init().mpi1-3/+1
2020-04-29Use the same inittodr()/resettodr() implementation as onkettenis1-2/+2
2020-02-20controler -> controllerjsg1-3/+3
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.jsg2-2/+10
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofmpi1-18/+18
2019-12-08Remove kernel VM86 support.mpi1-43/+0
2019-11-07Convert db_addr_t -> vaddr_t but leave the typedef for now.mpi1-2/+2
2019-08-04Fix a typo I noticed reviewing the smbios code cleanup diff.kmos1-2/+2
2019-08-04Cleanup the bios(4)/smbios(4) code a bit. Fix some KNF issues, reducekettenis2-142/+156
2019-07-26emove duplicate definitions of LAPIC_ID_MASK and LAPIC_ID_SHIFT.kevlo1-3/+1
2019-06-28Write back and invalidate caches before updating CPU microcode,bluhm1-2/+2
2019-06-14Add TSC_ADJUST CPUID flag.kettenis1-1/+2
2019-04-10change marks[] array to uint64_t, so the code can track full 64-bitderaadt1-2/+2
2019-03-23Use the debugger mutex for `ddb_mp_mutex'. This should prevent a racevisa1-2/+2
2019-01-22flense more trailing whitespacephessler1-4/+4
2019-01-22remove trailing whitespace in the Laptop Package part of the license text.phessler1-4/+4
2019-01-18delete vmm(4) in i386pd7-1332/+8
2018-12-05Include srp.h where struct cpu_info uses srp to avoid erroring out whenjsg1-1/+2
2018-10-02Unify the MD byteswapping code as much as possible across architectures.naddy1-22/+23
2018-09-11Add defines for amd microcode msrs which appear to be present since k8jsg1-1/+3
2018-08-29First pass in bringing i386 in sync with amd64. This does not yet work, but ispd1-1/+43
2018-08-25Define __HAVE_ACPI.kettenis1-1/+3
2018-08-23port the amd64 code for loading intel microcode on boot to i386jsg3-3/+13
2018-08-21print rdtscp and xsave_ext cpuid bits on i386 as welljsg1-1/+22
2018-08-21print sefflags_edx cpuid bits on i386 as welljsg1-1/+2
2018-08-20Remove unused spllock().visa1-2/+1
2018-08-15add cpuid and msr bits fromjsg1-6/+21
2018-08-08Recognise 'Speculative Store Bypass Disable' support cpuid bit.jsg1-1/+2
2018-07-30Use the MI interrupt enable/distable API instead of the MD one on i386 andkettenis1-17/+3
2018-07-24Do the same for i386 as amd64:brynet1-1/+2
2018-07-12unbreak i386 build, thanks to pd@ for noticing. Same diff as I committedmlarkin1-6/+16
2018-07-09Delete the VM86 kernel option and i386_vm86(3) API: it's requiredguenther4-189/+3
2018-06-30Add intr_enable() function, intended for MI use to amd64 and i386 and usekettenis1-1/+7
2018-06-22Finish the last missing piece for the i386 meltdown fix:bluhm4-26/+32
2018-06-21Save and restore retguard area during hibernate unpack. This copies themlarkin1-2/+2
2018-06-15Reorder trapframe/intrframe to put %ebp next to %eip and make itbluhm1-5/+5
2018-05-28More steps for i386 Meltdown fix:bluhm3-9/+19
2018-04-30vmd(8): unbreak i386mlarkin1-0/+7
2018-04-17- Make rnd hints avoid the brk area. The rnd allocator refuses to allocate inotto1-2/+2
2018-04-11More steps for i386 Meltdown fix:bluhm8-17/+163
2018-03-31Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.bluhm6-39/+29
2018-03-22iBackout the preparations for fixing Meltdown on i386. The task wasbluhm6-29/+39
2018-03-13Preparation for i386 Meltdown fix:bluhm6-39/+29
2018-03-05#define _MAX_PAGE_SHIFT in MD _types.h as the maximum pagesize an archderaadt1-1/+2
2018-02-10Additional AMD CPUID bits documented injsg1-2/+7
2018-01-25Move common mutex implementations to a MI place.mpi1-84/+2
2018-01-13Define and use IPL_MPFLOOR in our common mutex implementation.mpi2-3/+4
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