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path: root/sys/arch/powerpc64/include
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2020-06-22Add opalcons(4), a driver for the OPAL console.kettenis1-0/+2
2020-06-22Handle data storage and data segment interrupts from userland as well.kettenis1-1/+4
2020-06-22Make return-to-user and kernel re-entry work. This adds a per-pmap SLBkettenis3-4/+7
2020-06-22Provide working definitions of PROC_STACK() and PROC_PC().kettenis1-3/+3
2020-06-21Set up exec_map and phys_map.kettenis1-0/+2
2020-06-21Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).kettenis4-5/+18
2020-06-19VM_MAXUSER_ADDRESS needs to be page-aligned.kettenis1-1/+1
2020-06-18Cache kernel SLB entries in per-CPU struct and restore them uponkettenis2-4/+13
2020-06-17Print CPU name and cache info in the same way as we do on arm64.kettenis1-1/+9
2020-06-17More pmap bits, mostly from powerpc andd arm64.kettenis1-2/+37
2020-06-14Implement cpu-rnd_messybits() as a read of the cycle counter register.kettenis1-2/+9
2020-06-14Get context switching between kernel threads going.kettenis6-9/+66
2020-06-14Make soft interrupts work.kettenis1-10/+14
2020-06-14Minimal >machine/asm.h> to make ffs.S build.kettenis1-0/+4
2020-06-13Add support for the XIVE interrupt controller found on POWER9 CPUs.kettenis4-31/+140
2020-06-12Teach powerpc64 ddb to x, w, break, step, trace.gkoehler2-6/+9
2020-06-10Add clock interrupt support, adapted from the randomized dual clockkettenis1-1/+7
2020-06-10Allocate MSIs from the range provided by the device tree and bind themkettenis1-0/+2
2020-06-10Another OPAL API that we need.kettenis1-1/+3
2020-06-10A bit of MSI support code; we need to distinguish between 32-bit and 64-bitkettenis1-3/+4
2020-06-10Add MSI support calls.kettenis1-1/+7
2020-06-10Add RTC read and write calls.kettenis1-1/+5
2020-06-09Implement intr_enable(), intr_disable() and intr_restore().kettenis1-3/+56
2020-06-09Add mtdec().kettenis1-1/+7
2020-06-08More OPAL interfaces.kettenis1-1/+54
2020-06-08More stubs.kettenis1-0/+4
2020-06-08use the 64-bit byte-swapping load/store instructions available startingnaddy1-10/+9
2020-06-07Add bus_space(9) implementation. Tis implementation includes somekettenis1-6/+519
2020-06-07Add more return codes.kettenis1-1/+18
2020-06-07Probe the PCI bus.kettenis2-0/+133
2020-06-07Add functions to read/write from/to PCI config space.kettenis1-7/+13
2020-06-07Add missing file.kettenis1-0/+36
2020-06-07mainbus(4) and cpu(4).kettenis2-1/+12
2020-06-07Implement pmap_zero_page() and pmap_copy_page().kettenis1-1/+1
2020-06-07Enable translation in the trap handlers.kettenis1-3/+2
2020-06-06Bootstrap a kernel pmap and enable translations.kettenis4-6/+136
2020-06-01PowerPC64 header files for floating point.drahn3-0/+215
2020-05-31introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg1-0/+2
2020-05-27Enter ddb at a trap instruction or with db_enter().gkoehler4-23/+82
2020-05-23Define PTE bits.kettenis1-0/+50
2020-05-23Clean up the code that implements the OPAL API.kettenis1-0/+36
2020-05-22Fill complete trap frame.kettenis1-0/+3
2020-05-22Add some very simple trap handling.kettenis5-9/+200
2020-05-21Claim the memory region reserved for the interrupt vectors.kettenis1-0/+145
2020-05-17Add enough stubs to allow "option DDB" to build.gkoehler2-0/+10
2020-05-17Use a register varible ro implement curpcu().kettenis1-7/+2
2020-05-17Hand those pages over to uvm.kettenis1-1/+2
2020-05-17The 64-bit Power ABI reserves r13 for the thread pointer, so use thatkettenis1-1/+7
2020-05-16Planting the first seed for OpenBSD/powerpc64.kettenis27-0/+1360