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* Include <sys/systm.h> directly instead of relying on hidden UVM includes.mpi2020-10-071-1/+2
| | | | The header is being pulled via uvm_extern.h -> uvm_map.h
* Change kcopy(9) such that it does 64-bit and 32-bit copies whenever possible.kettenis2020-10-041-7/+17
| | | | | | | | | | | This makes sure a kcopy(9) that is a sequence of 64-bit or 32-bit values that are properly aligned is done atomically. This is needed for kbind(2) as it needs to update PLT/GOT entries atomically when doing lazy binding. This seems to fix some random SIGSEGV and SIGTRAP when linking stuff with ld.lld. ok deraadt@
* Add astfb(4), a driver for the framebuffer of the Aspeed BMC found onkettenis2020-10-013-2/+248
| | | | many POWER8 and POWER9 systems.
* correct size argument to free(9)jsg2020-10-011-2/+2
| | | | ok kettenis@
* Do the NULL -> cpu_info_primary conversion in the interrupt controllerkettenis2020-09-263-6/+9
| | | | | | drivers instead of the "midlayer". I had missed a couple of places in the midlayer and instead of fixing this in several places it is better to do it in the functions that get invoked in the end.
* Add support for POWER9P "Axone" CPUs.kettenis2020-09-261-1/+4
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* Sprinkle some .type statements to help btrace(4) pick function names.kettenis2020-09-252-2/+4
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* Implement stacktrace_save_at().kettenis2020-09-251-1/+39
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* Add missing calls to uvm_grow(9).kettenis2020-09-251-1/+5
| | | | ok deraadt@
* mi_ast() should not use the old cpu, but the cpu (after potential sleepderaadt2020-09-241-2/+2
| | | | | in refreshcreds() ok kettenis
* Only perform uvm_map_inentry() checks for PROC_SP for userland pagefaults.deraadt2020-09-241-5/+11
| | | | | | | | This should be sufficient for identifying pivoted ROP. Doing so for other traps is at best opportunistic for finding a straight-running ROP chain, but the added (and rare) sleeping point has proven to be dangerous. Discussed at length with kettenis and mortimer. ok mortimer kettenis mpi
* Use an IPI, so hw.setperf affects all cores in the mp kernel.gkoehler2020-09-235-12/+44
| | | | | | | | | | Before, apm -A was speeding up only one core of my POWER9. Now, apm -A speeds up all cores, so my parallel builds are faster. I copy the idea from amd64 and i386: mp_setperf() sends an IPI to all cpus; the interrupt handler calls ul_setperf(). ok deraadt@ kettenis@
* Correctly pass the "struct cpu_info" pointer along when establishingkettenis2020-09-218-28/+35
| | | | | | | | interrupts. This fixes IPIs on machines with certain (newer?) OPAL firmware. It also allows implementing pci_intr_establish_cpu(9), which is needed for distributing interrupt handlers across CPUs. tested by gkoehler@
* Stop using %r13 as the per-cpu register in the kernel. Sincekettenis2020-09-156-27/+24
| | | | | | uvm_map_inentry() may sleep we would have to do the same fixup as after calling uvm_fault() there. It is just simpler and safer to just rely on the pointer in SPRG0.
* Add a proper VSID allocation scheme for userland segments.kettenis2020-09-072-5/+49
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* Implement spilling of kernel SLB entries. Mostly from FreeBSD.kettenis2020-09-057-10/+214
| | | | | | | | | | | | | This makes it possible to use more SLB entries for the kernel than the hardware supports. The design is such that a subset of the hardware SLB entries can be replaced when needed. This makes sure the entries mapping kernel code and data and the page tables ar always present. Traps for missing SLB entries are handled in real-mode and on a special stack such that it doesn't have to rely on SLB entires mapping kernel stacks. With this in place we can increase KVA to 32GB. Hopefully that's enough to support large memory configurations.
* Whitespace.kettenis2020-09-051-4/+4
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* Add mpii(4).kettenis2020-09-053-9/+12
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* Restrict the size of the page table to 2G such that it never occupies morekettenis2020-09-041-2/+2
| | | | than 8 SLB entries.
* Make the kernel address space a bit bigger.kettenis2020-09-041-1/+1
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* Restrict the size of the page table to 2G such that it never occupies morekettenis2020-09-041-1/+5
| | | | than 8 SLB entries.
* Sprinkle some more eieio(); seems to avoid triggering the KASSERT(new > old).kettenis2020-09-031-3/+5
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* vfs_shutdown() is neccessary to ensure buffer cache drain before reexec()deraadt2020-09-021-1/+4
| | | | ok kettenis visa
* Fix signotify() for powerpc64 bsd.mpgkoehler2020-09-012-5/+15
| | | | | | | Copy signotify() from amd64, so that if proc *p is on another cpu, then signotify(p) notifies the correct cpu. ok kettenis@
* Implement address translation for bus_space_mmap(9).kettenis2020-09-011-1/+25
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* Store the device tree node in the pcitag_t.kettenis2020-09-012-4/+38
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* Add PMAP_NOCACHE flag to the address returned by the generickettenis2020-09-011-2/+2
| | | | | bus_space_mmap(9) implementation to make sure we enter mappings with the right memory attributes.
* Reorganize the interrupt handler code to avoid a potential bogus KASSERT,kettenis2020-08-301-10/+12
| | | | | | handle the priority levels better and guarantee ordering of restoring the priority level after running an interrupt handler and checking for a new interrupt.
* Lock all kernel PTE entries into the page tables, even "managed" oneskettenis2020-08-301-1/+4
| | | | | | | | | | entered by pmap_enter(9). Otherwise kernel stack pages get evicted and that doesn't end well. We probably only need to lock in wired pages and I will probably revisit this at some later stage. tested by deraadt@
* Only fall back on using the first potential root disk as the boot disk ifkettenis2020-08-291-2/+4
| | | | | | the boot kernel didn't hand us a valid bootduid. ok visa@
* Mark certain sections with debug information as "allocated" such that theykettenis2020-08-291-2/+14
| | | | | | | get picked up by ddb. This makes the "pp" and "show struct" commands that depends on CTF work. ok gkoehler@
* Improve detection of the proper boot device by picking the disk thatkettenis2020-08-261-1/+14
| | | | | | matches the bootduid of the boot kernel. ok visa@
* Declare hw_{prod,serial,uuid,vendor,ver} in <sys/systm.h>.visa2020-08-261-4/+1
| | | | OK deraadt@, mpi@
* Clear user SLB upon context switch.kettenis2020-08-253-6/+14
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* Enable xicp(4) here as well.kettenis2020-08-241-1/+2
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* Add some USB HID devices.kettenis2020-08-243-3/+24
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* Enable xicp(4).kettenis2020-08-231-1/+2
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* Add xicp(4), a driver for the interrupt control presenter hardware foundkettenis2020-08-233-2/+290
| | | | on POWER8 CPUs.
* Add support for "normal" external interrupts. Needed for running on POWER8kettenis2020-08-233-4/+26
| | | | and earlier CPUs.
* Add OPAL_SET_XIVE and OPAL_GET_XIVE.kettenis2020-08-232-14/+20
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* Add missing conversion from IPL to CPU priority.kettenis2020-08-231-2/+2
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* Attempt to support IODA2 bridges such as the one found on POWER8 chips.kettenis2020-08-231-3/+4
| | | | | These lack an "ibm,opal-available-m64-ranges" property, but it seems we can assume a 0-15 range. At least this is what Linux does.
* Add support for POWER8 (and maybe earlier) CPUs. Not sure if this works onkettenis2020-08-235-24/+64
| | | | | | | | | | real hardware, but it gets the kernel booting on QEMU emulating a POWER8 CPU so it's a step in the right direction. This establishes a way to distinguish CPU features based on the AT_HWCAP and AT_HWCAP2 features documented in the ELF ABI. Also use this to determine the availability of the DARN instruction instead of keying of the processor model.
* Use u_long for generation of VSIDs.kettenis2020-08-211-3/+3
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* Push KERNEL_LOCK/UNLOCK() dance inside trapsignal().mpi2020-08-191-9/+1
| | | | ok kettenis@, visa@
* Switch to a per-proc SLB cache. Seems to make GENERIC.MP kernelskettenis2020-08-175-15/+22
| | | | | (much more) stable. Probably because we could restore an incoherent SLB cache since there was no locking in the trap return path.
* Remove "for all XXX platforms" from comment. Fixes the issue pointed outkettenis2020-08-141-2/+2
| | | | | | by miod@ where the powerpc64 claimed to be "for all AArch64 platforms". ok patrick@
* Fix typo.kettenis2020-08-141-2/+2
| | | | Spotted by miod@
* Initialize local variable that was supposed to hold the value of curcpu().kettenis2020-08-141-2/+2
| | | | Spotted by miod@
* sigh, some duplication, but at least put things into the canonical orderderaadt2020-08-051-3/+1
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