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* Remove the unused interrupt type (edge/level) from the mace interruptvisa2018-12-031-2/+2
| | | | | | | | handler registration. The code is inherited from isa(4), but on the O2, although some interrupt sources on CRIME are edge-triggered, all the MACE interrupts are level-triggered. From miod@
* It's init as a process that's special, not init's original thread.guenther2014-07-111-2/+2
| | | | | | Remember initprocess instead of initproc. ok matthew@ blambert@
* machdep.kbdreset enables a shutdown by Ctrl-Alt-Del on amd64 andnaddy2011-06-241-4/+4
| | | | | | | | | | | | | | | i386. Stop abusing it on other archs for controling a shutdown by pressing the soft power button: * Add a MI sysctl hw.allowpowerdown; if set to 1 (the default) it allows a power button shutdown. * Make acpi(4)/acpibtn(4) honor hw.allowpowerdown. * Switch the various power button intercepts on landisk, sgi, sparc64 and zaurus over to hw.allowpowerdown. * Garbage collect the machdep.kbdreset sysctl on all archs other than amd64 and i386. ok miod@
* Allow xbow_intr_establish() callers to provide optional storage for themiod2009-11-251-2/+2
| | | | struct intrhand, instead of having it malloc()'ed.
* Rename struct confargs to struct mainbus_attach_args for consistency and alsomiod2009-10-261-3/+3
| | | | to prevent further abuse of it.
* Add support for the Octane power button to power(4). Took me a while tomiod2009-10-261-31/+75
| | | | | figure out how the interrupt was routed from xbridge to xheart... (it bypasses the regular `have xbridge send a xio interrupt packet' mechanism)
* Better crime/mace interrupt handling; interrupt information is no longermiod2009-10-261-20/+6
| | | | | | | | specified in the kernel configuration file, but is provided by macebus(4) as part of the child device attachment args, and provide both crime and mace interrupt bitmasks; this allows us to only really enable interrupt sources we care about, and to avoid invoking interrupt handler we don't need to for the few mace interrupts multiplexed at the crime level.
* need that include file...deraadt2009-05-161-1/+2
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* TOD clock support for IOC3 flavours with DS174x chips (which are rebadgedmiod2009-05-151-40/+37
| | | | | MK48Txx). Entangled with preliminary changes which will hopefully eventually lead to power(4) attaching on IP30 (but not finished yet).
* - remove some unneeded headersjasper2008-09-161-9/+1
| | | | with and ok jsing@
* There's no need to print the IRQ now that we have direct configuration.jsing2008-02-211-15/+9
| | | | | | Cleanup the interrupt establishment code a little whilst we're here. ok miod@ jasper@
* Completely overhault attachment rules on sgi. No more indirect configurationmiod2008-02-201-8/+2
| | | | | | | | inherited from OpenBSD/arc machines with ISA bus; mainbus children match on device name and other hierarchies match on simplified locators. As a bonus, attachment lines in dmesg will now print their locators. ok jsing@
* power(4) can now make use of the DS1687 register definitions header file.jsing2007-12-271-4/+3
| | | | ok jasper@
* move variable declarations where they belongjasper2007-12-181-5/+5
| | | | prodded by and ok dlg@
* - powerbutton -> power buttonjasper2007-12-181-5/+5
| | | | - minor knf nit (suggested by miod@)
* add power(4), a driver for the power button found on SGI O2's.jasper2007-12-181-0/+142
when machdep.kbdreset is set, and the correct interrupt is fired, the machine gets shut down. with help from and ok jsing@, ok miod@
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