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* The device_to_pa routine really isn't needed. We always have physicalvisa2017-05-111-4/+4
| | | | | | | addresses. While there, pave the way for BUS_DMA_64BIT (not working yet). Diff from miod@; OK dlg@
* add a BUS_DMA_64BIT flag to bus_dma on all our archs.dlg2017-05-081-1/+2
| | | | | | | | | this is so drivers can advertise that they can handle 64 dma addresses to the platform. it may choose to handle dmamaps differently based on this flag. tweaks and ok tom@ ok kettenis@
* Support BUS_DMA_NOCACHE in bus_dma(9). Memory allocations done withmiod2014-03-101-15/+16
| | | | | | BUS_DMA_NOCACHE (or BUS_DMA_COHERENT if the platform does not have coherent caches) will use PMAP_NOCACHE when invoking pmap_enter(), to avoid creating cached mappings, and then evicting them from the cache.
* No longer allow bus_space_barrier() to be a NULL pointer on a givenmiod2012-03-151-5/+2
| | | | | bus_space_tag on sgi, but rather always provide at least a dummy asm("sync") flavour. Saves a function pointer test at runtime.
* Implement bus_space_barrier() on sgi; on xbridge, this will also flushmiod2010-08-231-3/+13
| | | | the pci write buffers.
* Fix bus_space_{read,write}_raw_region_# operation.miod2010-04-041-3/+3
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* Pass both the virtual address and the physical address of the memory rangemiod2009-12-251-2/+3
| | | | | | | | | | when invoking the cache functions. The physical address is needed when operating on physically-indexed caches, such as the L2 cache on Loongson processors. Preprocessor abuse makes sure that the physical address computation gets compiled out when running on a kernel compiled for virtually-indexed caches only, such as the sgi kernel.
* Get rid of the obsolet BUS_BARRIER_xxx constants for bus_space_barrier(), onlymiod2009-07-301-5/+1
| | | | provide and use BUS_SPACE_BARRIER_xxx.
* Make sure all platforms understand the flags argument of bus_space_map() andmiod2009-07-261-4/+5
| | | | | | bus_space_alloc() as a bitmask of flags, and not a boolean controlling cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented in the manual page are defined on all platforms as well.
* Get rid of bus_mem_add_mapping().miod2009-07-231-5/+1
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* Get rid of bus_space_tag_t now unused bus_extent and bus_reverse fields.miod2009-07-221-3/+1
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* Define BUS_SPACE_MAP_CACHEABLE.miod2009-07-221-1/+2
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* Update bus_dma to the better codebase found on almost all other platforms,miod2009-07-171-1/+5
| | | | | | | | | | where the common part to all bus_dmamap_load*() functions is implemented in in an internal load_buffer routine. This allows the xbridge-specific dma code to only provide this function, instead of three; and this also brings us a working bus_dmamap_load_uio() on all supported sgi machines, which in turns make crpyto(4) devices really work. Tested with hifn(4).
* Remove BUS_DMAMEM_NOSYNC definition. Its name is not consistent withmiod2009-05-311-2/+1
| | | | | | other BUS_DMA_xxx flag names, and nothing uses it. ok many@
* Revert the memory range restriction code added to _dmamem_alloc(); devicesmiod2009-05-241-2/+3
| | | | | | | | which require it will provide their own _dmamem_alloc() in their own bus_dma_tag_t. While there, rename bus_dma_segment_t ds_vaddr member to _ds_vaddr to make it clear this is an internal member.
* Add a BUS_DMA_ZERO flag for bus_dmamem_alloc() to return zeroed memory.oga2009-04-201-13/+14
| | | | | Saves every damned driver calling bzero(), and continues the M_ZERO, PR_ZERO symmetry.
* The start of Origin 200 support. Based on some code contributed by pefo@miod2009-04-131-2/+2
| | | | | | | | | some years ago for KL enumeration, building on the existing XBow support to limit ourselves to a single node for now. This is a work-in-progress; it currently lacks complete interrupt code, as well as PCI resource management. And there are likely bugs creeping inside.
* Add bus_space_read_raw_region_* and bus_space_write_raw_region_* bus spacejsing2008-08-251-1/+39
| | | | | | accessors to OpenBSD/sgi. ok miod@
* Implement bus_space_{read,write}_raw_mult_[248] correctly, it needsmiod2008-07-301-29/+27
| | | | | endianness conversion on pci bridges. ok deraadt@ jsing@
* Implement bus_space_*8 and bus_space_vaddr.miod2008-03-301-18/+21
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* More dead includes and functions noone will mourn.miod2008-02-201-3/+1
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* Add BUS_SPACE_MAP_LINEARjsing2007-11-271-1/+3
| | | | ok miod@
* Extent sgi bus_dma to cope with different views of memory: non-contiguousmiod2007-06-211-2/+8
| | | | | | | for the cpu, contiguous from different bases for devices. This allows memory above 256MB to be used with bus_dma (and we had really been lucky with the first few large-memory builds). Information about memory accesses taken from Linux.
* Eradicate the type 'bus_dmasync_op_t'. Unused. Sporadicallykrw2006-05-271-2/+1
| | | | | | implemented. Use int. ok mickey@ miod@
* Fix typo.kettenis2005-01-021-2/+3
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* spacingderaadt2004-08-101-6/+6
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* spacingderaadt2004-08-101-4/+4
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* initial sgi importpefo2004-08-061-0/+428
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