| Commit message (Collapse) | Author | Age | Files | Lines |
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bus_space_read_region_n, bus_space_write_region_n and
bus_space_set_region_n functions were all broken.
Same fix as arm64; Thanks to patrick@ for noting that mips64 had the same
code.
ok visa@
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addresses. While there, pave the way for BUS_DMA_64BIT (not working
yet).
Diff from miod@; OK dlg@
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this is so drivers can advertise that they can handle 64 dma addresses
to the platform. it may choose to handle dmamaps differently based
on this flag.
tweaks and ok tom@
ok kettenis@
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BUS_DMA_NOCACHE (or BUS_DMA_COHERENT if the platform does not have coherent
caches) will use PMAP_NOCACHE when invoking pmap_enter(), to avoid creating
cached mappings, and then evicting them from the cache.
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bus_space_tag on sgi, but rather always provide at least a dummy asm("sync")
flavour. Saves a function pointer test at runtime.
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the pci write buffers.
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when invoking the cache functions. The physical address is needed when
operating on physically-indexed caches, such as the L2 cache on Loongson
processors.
Preprocessor abuse makes sure that the physical address computation gets
compiled out when running on a kernel compiled for virtually-indexed
caches only, such as the sgi kernel.
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provide and use BUS_SPACE_BARRIER_xxx.
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bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.
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where the common part to all bus_dmamap_load*() functions is implemented in
in an internal load_buffer routine.
This allows the xbridge-specific dma code to only provide this function,
instead of three; and this also brings us a working bus_dmamap_load_uio()
on all supported sgi machines, which in turns make crpyto(4) devices really
work. Tested with hifn(4).
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other BUS_DMA_xxx flag names, and nothing uses it.
ok many@
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which require it will provide their own _dmamem_alloc() in their own
bus_dma_tag_t.
While there, rename bus_dma_segment_t ds_vaddr member to _ds_vaddr to make
it clear this is an internal member.
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Saves every damned driver calling bzero(), and continues the M_ZERO,
PR_ZERO symmetry.
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some years ago for KL enumeration, building on the existing XBow support
to limit ourselves to a single node for now.
This is a work-in-progress; it currently lacks complete interrupt code,
as well as PCI resource management. And there are likely bugs creeping
inside.
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accessors to OpenBSD/sgi.
ok miod@
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endianness conversion on pci bridges.
ok deraadt@ jsing@
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ok miod@
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for the cpu, contiguous from different bases for devices. This allows
memory above 256MB to be used with bus_dma (and we had really been lucky
with the first few large-memory builds).
Information about memory accesses taken from Linux.
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implemented. Use int.
ok mickey@ miod@
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