| Commit message (Collapse) | Author | Age | Files | Lines |
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dc doesn't fit on the alpha ramdisk, so let de win in all cases.
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Also match on 21140
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ALso, get the MAC address from myetheraddr() instead of trying to use the eeprom on sparc64.
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- descriptor lists are now bus_dma allocated and manipulated
(for those keeping score: 6 vtophys dead, 4 to go)
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(Look ma, I might have broken the tree)
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patch from ckuethe@pyxis.cns.ualberta.ca in PR/2102. At some point after 3.0
I must de-cruftify the dc(4) matching code to avoid such errors. :(
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All callers actually took all arguments to pci_intr_map from pci_attach_args
structs, so this simplifies code.
This also allows more complicated interrupt assignment schemes like the one
on sparc64.
This makes sparc64 pci interrupts work.
Inspired by the same change in NetBSD.
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10/100 CardBus Ethernet adapter (thanks to beck@ for the donation).
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with multiple 21143 interfaces.
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- General cleanup in the dc CardBus attachment.
- Split detach up into bus-dependent and bus-independent parts.
- Some function and variable renaming for consistency.
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These changes should make the driver work with the built-in Ethernet on the
Alpha Miata machines. From FreeBSD.
To make sure I didn't break anything (and as a general test), I tested the
modified driver with the following dc(4) variants: Macronix PMAC 98715,
Lite-On PNIC, Lite-On PNIC-II, ADMtek AL981, and ADMtek AN983.
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laptops; from FreeBSD. No special changes needed here, just the addition of
the EN2242's product ID since it is an ADMtek Centaur chip.
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Yet another bug fix/optimization for the Davicom DM9100/9102: increase the
PCI latency timer value to 0x80. Davicom's Linux driver does this, and it
drastically reduces the number of TX underruns in my tests. (Note: this is
done only for the Davicom chips. I'm not sure it's a good idea to do it
for all of them.)
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Set the DC_TX_INTR_ALWAYS and DC_TX_STORENFWD flags for the Davicom chips.
Do not set DC_TX_ONE. The DC_TX_USE_INTR flag causes dc_encap() to set the
'interrupt on TX completion' bit only once every 64 packets. This is an
attempt to reduce the number of interrupts generated by the chip. You're
supposed to get a 'no more TX buffers left' interrupt once you hit the last
packet whether you ask for one or not, however it seems the Davicom chip
doesn't generate this interrupt, or at least it doesn't generate it under
the same circumstances. The result is that if you transmit n packets, where
n is less than 64, and then wait 5 seconds, you'll get a watchdog timeout
whether you want one or not. The DC_TX_INTR_ALWAYS causes dc_encap() to
request an interrupt for every frame.
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non-MII 21143-based cards work. The sync just fixes the LED handling on these
kinds of adapters.
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- Add support for Accton EN1217 Ethernet adapters.
- Fix problems with LEDs on some cards when clearing the jabber disable bit.
- Handle new Macronix chips whose multicast hash tables are only 128 bits.
- Fix timing issues during autonegotiation with Macronix and PNIC II.
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(cardbus to come later).
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