| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | remove some ifdef notyet code that doesn't seem to be moving forward... |   tedu | 2020-01-24 | 1 | -249/+1 |
| * | consistently uppercase pci product defines |   jsg | 2020-01-05 | 1 | -3/+3 |
| * | Introduce two quirks to prevent attaching ATA and ATAPI devices |   mikeb | 2017-07-12 | 1 | -1/+9 |
| * | Goto a loop_end label rather than using a continue statement for an |   mmcc | 2015-12-21 | 1 | -2/+4 |
| * | Double the delay between the PHY reset and the status check for |   mpi | 2015-11-24 | 1 | -2/+2 |
| * | The change of 5.7's sys/arch/i386/i386/bus_space.c and |   uaa | 2015-10-18 | 1 | -2/+14 |
| * | sizes for free(); ok sthen |   deraadt | 2015-09-10 | 1 | -8/+14 |
| * | Print speeds consistently. | mpi | 2015-03-21 | 1 | -10/+10 |
| * | Remove some includes include-what-you-use claims don't | jsg | 2015-03-14 | 1 | -2/+1 |
| * | match on C610 | jsg | 2015-01-09 | 1 | -1/+13 |
| * | Use <sys/endian.h> instead of <machine/endian.h> |   guenther | 2014-12-19 | 1 | -2/+2 |
| * | Additonal registers needs to be saved in sc_save2, not sc_save. |   kettenis | 2014-10-16 | 1 | -5/+5 |
| * | match on Intel 9 series and 9 series LP PCH, and add 8 series KT to puc | jsg | 2014-08-13 | 1 | -1/+9 |
| * | pciide.c, pciide_rdc_reg.h(new): ported rdcide(4) from NetBSD. |   sasano | 2014-07-13 | 1 | -2/+163 |
| * | add a size argument to free. will be used soon, but for now default to 0. | tedu | 2014-07-12 | 1 | -2/+2 |
| * | no need to check for default_chip_map twice in one if statement | jsg | 2014-04-24 | 1 | -2/+1 |
| * | match some more intel sata devices in ide mode | jsg | 2014-04-24 | 1 | -1/+73 |
| * | Add a DVACT_WAKEUP op to the *_activate() API. This is called after the | deraadt | 2013-12-06 | 1 | -7/+4 |
| * | Fix edge cases of uninitialized variables. In my tree for too long, I even |   miod | 2013-05-27 | 1 | -1/+2 |
| * | - add some intel 7 series sata ids. |   jasper | 2013-01-05 | 1 | -1/+13 |
| * | Revamp the sequences for suspend/hibernate -> resume so that the code | deraadt | 2012-10-08 | 1 | -1/+4 |
| * | VT6410 and VT6415 controllers do not implement the `channel enable' register, | miod | 2012-04-22 | 1 | -17/+27 |
| * | Don't call wdcintr() for channels that aren't properly initialized or don't | kettenis | 2012-03-13 | 1 | -1/+4 |
| * | As SiS IDE has the same PCI product id for different revisions | jsg | 2012-01-15 | 1 | -2/+4 |
| * | Add support for SiS 1183 SATA. From/tested by Loganaden Velvindron. | jsg | 2012-01-04 | 1 | -1/+5 |
| * | Unbreak tree after kettenis's sanitization in pcidevs | guenther | 2011-11-12 | 1 | -9/+9 |
| * | Make sure we set UDMA capabilities for HT-1000 IDE, | jsg | 2011-11-02 | 1 | -1/+2 |
| * | use default_chip_unmap for sata_chip_map, lets the via controllers detach | jsg | 2011-09-17 | 1 | -1/+2 |
| * | Cope with the start-dma-before-init errata and some other register setup | deraadt | 2011-07-15 | 1 | -1/+12 |
| * | pass the interface for non-compat-mode piix. from netbsd. |   jcs | 2011-07-11 | 1 | -7/+6 |
| * | Refactor queue allocation and initialization into a wdc_alloc_queue() |   matthew | 2011-05-09 | 1 | -20/+14 |
| * | Initialize the wdc ata_drive_datas structs earlier in wdcattach() so | matthew | 2011-05-09 | 1 | -22/+4 |
| * | support Intel 6 series SATA in non raid/non ahci mode. | jsg | 2011-04-27 | 1 | -1/+17 |
| * | keep an eye out for wdc registers returning 0xff. if they return 0xff, | deraadt | 2011-04-18 | 1 | -1/+3 |
| * | add support for VIA VT6415 & VX900 IDE | jsg | 2011-04-14 | 1 | -2/+12 |
| * | Avoid using an uninitialized variable when downgrading PIO mode too much on | miod | 2011-04-07 | 1 | -1/+2 |
| * | use nitems(); no binary change for drivers that are compiled on amd64. | jasper | 2011-04-03 | 1 | -23/+21 |
| * | Mark NVIDIA MCP89 SATA controllers as such. Makes them use DMA instead of PIO | kettenis | 2010-11-18 | 1 | -1/+17 |
| * | Revision 0xc4 and earlier of the Acer Labs M5229 UDMA IDE controller can't do | kettenis | 2010-11-06 | 1 | -1/+15 |
| * | Add DVACT_QUIECE support. This is called before splhigh() and before | deraadt | 2010-08-31 | 1 | -1/+4 |
| * | no need to specially handle the 4 AMD756 registers at suspend/resume time; | deraadt | 2010-08-31 | 1 | -19/+2 |
| * | PCI configuration space register save/restore for AMD756. | miod | 2010-08-31 | 1 | -1/+19 |
| * | ok, that is the last of the easy chips to check for register saves. i'm | deraadt | 2010-08-06 | 1 | -2/+3 |
| * | another set of chips which do not need register rewrites at resume time | deraadt | 2010-08-06 | 1 | -1/+2 |
| * | no special registers to restore on via chips either | deraadt | 2010-08-03 | 1 | -2/+3 |
| * | jmicron code was writing to the wrong register; ok jsg | deraadt | 2010-08-02 | 1 | -2/+2 |
| * | Save/restore more registers at suspend/resume for those chips which look | deraadt | 2010-08-02 | 1 | -9/+28 |
| * | the default pciide chip needs no additional register restores; tested by jcs on one model | deraadt | 2010-07-28 | 1 | -2/+4 |
| * | suspend save/restore for SIS3112; tested by mlarkin | deraadt | 2010-07-28 | 1 | -1/+13 |
| * | Manuel Bouyer rescinded clauses 3 and 4 of his license text. | jsg | 2010-07-23 | 1 | -7/+1 |
