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path: root/sys/dev/pci/pcireg.h (follow)
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* Fix definitions of PCI_MSIX_MAU32 and add a define for the MSI-X functionkettenis2019-05-301-2/+3
| | | | | | mask bit. ok mlarkin@, jmatthew@
* Let ahci(4) match on _CLS instead of _HID when attaching at acpi(4). Avoidskettenis2018-08-031-1/+2
| | | | | | having to add many more _HID entries to the match table. ok deraadt@, mlarkin@
* vmd: allow guest PCI interrupt line reassignment.mlarkin2017-08-091-1/+3
| | | | | | | I also added a couple config space register names to pcireg.h to try and reduce the use of magic numbers in vmd/pci.c ok pd@
* From FreeBSD (r227593, r307982):kevlo2017-06-121-1/+2
| | | | | | | | | | | | | | | More and more RealTek controllers started to implement EEE feature. Vendor driver seems to load a kind of firmware for EEE with additional PHY fixups. It is known that the EEE feature may need ASPM support. Unfortunately there is no documentation for EEE of the controller so enabling ASPM may cause more problems. The Realtek vendor drivers for FreeBSD and Linux also disable ASPM and clock request. While here, add a define for the ECPM (Enable Clock Power Management) bit. Tested by stsp@ and myself. ok stsp@
* More PCI extended capabilities handling in pcidump.mlarkin2017-03-251-2/+2
| | | | | | From Simon Mages ok deraadt@
* Add some more PCI classes and subclasses. Checked against EDK2 asjsg2017-03-221-1/+8
| | | | | | | | | | | | "PCI Code and ID Assignment Specification" is only available for those willing to pay thousands of dollars for PDFs. Prompted by a dmesg from an AMD Zen system which uses class 0x13 (Non-Essential Instrumentation) and System subclass 0x06 (IOMMU). There is currently no public documentation for AMD family 17h to reference to see if this is sane. ok kettenis@ on an earlier version
* Print PCIe Extended Capabilities, from Simon Magesderaadt2017-03-161-1/+10
| | | | ok kettenis mlarkin
* Fix two issues in the MSI-X code. First, actually read the MSI-X capabilitykettenis2016-06-021-2/+5
| | | | | | | register. Second, correctly decode the table sizefromits contents. First issue pointed out by David Hill (with the help of clang). Second issue spotted after seeing a diff from Christiano Hasbaert.
* Initial support for MSI-X. Only supported on amd64 for now. I have diffs tokettenis2016-05-041-1/+16
| | | | | | | | | | actually use this in em(4) and xhci(4), but I'm not committing those yet because we almost certainly need to save and restore the MSI-X registers during suspend/resume. However, this allows mpi@ to play with multiple-vector support in networking hardware. Requested by mpi@ ok mlarkin@, mikeb@
* Add missing define for hpb(4).mpi2015-06-021-2/+4
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* Add PME_STATUS and PME_EN bitmasks for the PCI PMCSR register.stsp2014-04-271-6/+8
| | | | ok kettenis@
* apparently NVM is a type of mass storage nowdlg2014-04-091-1/+2
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* add a define for the link capabilities register forjsg2013-08-261-1/+3
| | | | version 2 of the PCIe capability.
* Define some more DCSR/DCTL bits; ok kettenismikeb2013-06-031-2/+8
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* Add define for capability 0x12 (SATA).kettenis2012-05-131-1/+2
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* Fix typo in the "fixed" HyperTransport MSI Mapping Capability address.kettenis2011-06-191-2/+2
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* Enable MSI for HyperTransport devices that have MSI remapping enabled.kettenis2011-05-301-2/+21
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* Add register definitions for PCI MSI capaility.kettenis2011-05-141-1/+14
| | | | ok oga@, miod@, marco@, dlg@, krw@
* PCIe based sparc64 machines have always supported access to the extended PCIekettenis2010-12-051-1/+2
| | | | | | | configuration space. So on pyro(4) and vpci(4) return the size appropriate for the extended PCIe configuration space. ok miod@
* Introduce a new pci routine, pci_conf_size(), which returns the size of amiod2010-12-041-1/+3
| | | | | | | given pcitag_t configuration address space. Currently, all pci controllers will return the usual 0x100 bytes of PCI configuration space, but this will eventually change on PCIe-capable controlers. ok kettenis@
* Add definition for "Extended Synch" bit in PCIe Link Control register.damien2010-12-011-1/+2
| | | | From PCI Express(R) Base Specification Rev 2.0.
* Add "Interrupt Disable" bit definition for the PCI Configuration Spacedamien2009-05-281-1/+2
| | | | | | Command register. From PCI Express Base Specification Rev 2.0. Use same naming as NetBSD. Needed for wpi(4) and iwn(4).
* move some generic PCIe register flags used in wpi(4) and iwn(4)damien2008-11-251-1/+4
| | | | | | into common pcireg.h ok deraadt@, kettenis@, dlg@
* Add PCI VPD read/write functions from NetBSD required for some thingsjsg2007-11-261-1/+11
| | | | | | dlg is playing with. 'put it in' dlg@
* First step towards PCI Express/ExpressCard hotplug. Unplug should work onkettenis2007-11-251-1/+35
| | | | | | detachable drivers. "put it in" deraadt@
* puc@cardbus (only added (commented out) to whom has puc@pci enabled)mickey2006-07-311-1/+6
| | | | | | tested on puc@pci by fkr and meself on the cardbus. still needs a bit more work but generally works. deraadt@ ok and some input from miod@
* add 2 subclasses, subclass storage SAS and subclass system SD Host Controller.brad2006-06-011-1/+2
| | | | From NetBSD
* Support for standard SD host controllers like the Ricoh 5C822, a smalluwe2006-05-281-1/+2
| | | | generic bus layer, and SCSI emulation for SD/MMC memory cards.
* add PCI multimedia subclass type of HD audio.brad2006-05-111-1/+2
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* add macros for the expansion ROM base address registerdlg2005-12-311-1/+14
| | | | ok brad@ grange@ fgsch@
* add PCI_ID_CODEbrad2004-11-161-1/+5
| | | | From NetBSD
* Mark u_int64_t constants with ULL to make gcc3 happy.grange2003-12-061-2/+2
| | | | ok drahn@
* convert __attribute__((__packed__)) to __packed so that parsers unawareavsm2003-11-161-4/+4
| | | | | of gcc extensions have more of a chance. ok mcbride@, no objections from millert@, deraadt@
* power management status reg. definition; from netbsd.fgsch2003-10-061-1/+2
| | | | ok deraadt@ henning@ krw@.
* this bit is defined as prefetchable and not cachable and thus rename and use appropriatelymickey2003-08-271-4/+4
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* PCI_CAP_MBI should really be PCI_CAP_MSIgrange2003-04-021-2/+2
| | | | ok jason@
* Add a couple of new pci subclasses and caps from NetBSDgrange2003-04-011-2/+16
| | | | ok jason@
* definitions and structures for vital product data (VPD); from netbsdjason2003-02-081-1/+64
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* define PCI_COMMAND_STATUS_BITS for printfs, according to the enlisted definesmickey2002-07-131-1/+7
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* s/REESSERVED/RESERVED/jason2002-04-061-2/+2
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* more class/subclass/caps ids; from netbsdmickey2001-05-081-7/+66
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* Add PCI Power Management Control Register definitions; from NetBSD.aaron2001-02-091-1/+10
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* Defines for min_gnt and max_lat fields in the bhlc reg.art2000-11-081-1/+11
| | | | Not used yet.
* support 64bit BARs from NetBSDniklas2000-09-201-2/+8
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* import a few useful consts from netbsd; mainly for pcibios thing slipmickey2000-08-021-1/+4
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* Missed earlier: add PCI_HDRTYPE_TYPE macro, from NetBSD.downsj1999-10-261-1/+3
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* Added pci_mapreg* interface from NetBSD.csapuntz1999-07-181-1/+28
| | | | | Added PCI 2.2 stuff from NetBSD Modified if_de to use mapreg interface
* A slew of manifest constants for pci configuration registers gotten from freebsdniklas1999-01-301-1/+64
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* fix bhlcr shift values; fgsch@olimpo.com.brderaadt1998-07-121-4/+4
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* UDF and 66MHz support; zubin@clouseau.arl.wustl.eduderaadt1998-04-251-2/+4
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