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path: root/sys/dev/sdmmc/sdmmc_mem.c (follow)
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* Implement UHS-I support in the sdmmc(4) midlayer.kettenis2020-08-241-12/+144
| | | | ok mglocker@
* Add support for eMMC HS200 mode. Loosely based on code from NetBSD.kettenis2020-08-141-35/+126
| | | | ok patrick@
* 4-bit bus width is mandatory for SDIO cards that support High Speedpatrick2018-06-041-4/+4
| | | | | | | mode, so switch from 1-bit to 4-bit bus width if the host controller supports it. ok kettenis@
* Bump the clock frequency to a higher level that every card (per spec)patrick2018-05-011-1/+7
| | | | | | | has to support for MMC cards prior to reading the extended registers. We already do this for SD cards. Fixes eMMC support on the i.MX8M. Tested by and ok kettenis@
* Add hibernate IO path for sdmmc(4). This requires some help from thejmatthew2018-03-201-1/+39
| | | | | | | | sdmmc chipset driver, currently only implemented in sdhc(4), but mostly uses the regular path. sdhc(4) also needed the ability to perform IO while cold. ok deraadt@
* add sizes to free() callsderaadt2017-04-061-2/+2
| | | | ok dhill
* Bump up the clock to 25 MHz before trying to read the SCR register of an SDkettenis2016-05-051-26/+37
| | | | | | card. Data transfers don't seem to work on the Realtek RTS5229 Card Reader if the clock frequency is too low, and reading the SCR requires a data transfer.
* Add Dual Data Rate support for eMMC at 52MHz.kettenis2016-05-051-30/+74
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* Add high-speed support for SD cards. In theory this should double thekettenis2016-05-041-5/+111
| | | | | transfer rates to and from the card. In practice the improvement will be smaller, but I am seeing serious improvement in the read speeds.
* Add bus width switching support for MMC. Enable 8-bit bus support onkettenis2016-05-011-4/+32
| | | | | | | sdhc(4) controllers that support it. Mostly from NetBSD. This makes the raw transfer rate of the eMMC on the Lenovo Ideacentre Stick 300 go up to 40 MB/s.
* Add a small delay after switching an MMC card into high-speed mode to makekettenis2016-05-011-1/+3
| | | | sure it has witched before changing the bus clock speed.
* Add support for changing the bus width to the sdmmc subsystem and the sdhc(4)kettenis2016-05-011-2/+121
| | | | | | controller. Use this to switch SD cards to a 4-bit bus if they support it. ok deraadt@, jsg@
* Implement DMA support. Bits and pieces taken from NetBSD, but we onlykettenis2016-04-301-17/+69
| | | | | | | | | | | | support ADMA2. The older SDMA mode has too many limitations to be really usable. Gives us only moderate speed improvements, bus reduces the CPU load considerably. We will reap the full benefits once we implement wider bus widths and high speed modes. There is a remining issue with simultanious use of eMMC and external SD card on (some) Intel Bay Trail hardware. Still under investigation. ok patrick@, stsp@, deraadt@
* Always claim to support sector mode for eMMC. Allows BeagleBone Blackjsg2015-11-081-1/+3
| | | | | | | | | | | | boards with Micron eMMC to work. The Micron eMMC seems to adhere to the spec which states: "If there is no indication by a host to a memory that the host is capable of handling sector type of addressing the higher than 2GB of density of memory will change its state to Inactive (similarly to a sit- uation in which there is no common voltage range to work with)" From Ian Sutton with feedback from uwe@
* Init error to 0 for sdmmc_mem_single_{read,write}_blockjsg2015-04-221-3/+3
| | | | | otherwise the value would be uninitialised in the unlikely case of being called with length 0.
* Fix high capacity (> 2GB) eMMC support.rapha2014-09-231-11/+16
| | | | | | Based on a diff by Cedric Tessier, nezetic at gmail dot com, thanks! Discussed with and ok jsg@
* add a size argument to free. will be used soon, but for now default to 0.tedu2014-07-121-2/+2
| | | | after discussions with beck deraadt kettenis.
* Add code for SMC_CAPS_SINGLE_ONLY capability.syl2013-10-221-8/+83
| | | | | | | | | This capability force the sdmmc stack to only issue single blocks transfers. tested by rapha@ and I on ommmc(4). tested by rapha@ on pxammc(4). ok rapha@
* Add basic support for eMMC memory.rapha2013-09-121-7/+153
| | | | | | | | Heavily based on netbsd. Tested by dlg@, bcallah@ (sdhc), stsp@ (rstx) and me (ommmc). ok patrick@
* lockmgr -> rwlock conversionblambert2010-08-241-10/+10
| | | | | | | and with this, my adventure in sdmmc-land is over bikeshed is still banana-shaped ok oga@
* - fold several occurences of DEVNAME() into one located in sdmmcvar.h.jasper2010-08-191-12/+12
| | | | | | making DEVNAME() usage a lot more consistent. ok krw@
* Only allow the common voltages of the card and the host when writing the OCRdrahn2010-02-101-1/+3
| | | | | back to the card. fixes a problem where the controller supported lower voltages than the card. With variable name change requested miod, ok miod@ krw@
* Add missing <sys/device.h>.kettenis2009-10-031-1/+2
| | | | ok deraadt@, miod@
* Remove recursion from the sdmmc locking regime.blambert2009-04-071-5/+10
| | | | | | | | | In snaps for a while. Originally hacked on phessler@'s couch. Testing by many, input from jsg@ "I'm tired of seeing the Ms" deraadt@
* Let the sdmmc adapters tell the sdmmc layer how much sectors they canmiod2009-02-201-9/+5
| | | | | | | | transfer with one command. Build on this and the recent minphys() changes in the sdmmc layer to crank transfers at the maximum possible size instead of a sad DEV_BSIZE. Depending on your controller, this can speed up sdmmc I/O up to 2.5 times.
* Add support for SDHC cards on SDHC capable host controllers.jsg2009-01-091-6/+24
| | | | | | | Thanks to everyone who tested in particular jsing@ who found several problems in the initial diffs. ok dlg@ jsing@ miod@
* backout: would have been nice if this had been tested, to see that itderaadt2008-12-021-8/+3
| | | | crashes the moment a card is plugged in.
* Rework sdmmc locking to remove recursionblambert2008-11-241-3/+8
| | | | | | | Add SDMMC_ASSERT_LOCKED(), replacing many locking calls, and sprinkling the assertion to make sure that future changes don't catch us out "please commit" uwe@
* DHC automatically sends a CMD12 after multiple-block transfers, but otheruwe2007-03-181-1/+26
| | | | controllers don't. Put in a temporary hack for pxammc on Zaurus.
* move CSD/CID decoding to sdmmc_mem.cuwe2006-11-291-1/+99
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* First and foremost, avoid an obious race between two or more processesuwe2006-07-181-12/+29
| | | | | | | | | | | | | | trying to get MMC commands through to the SD/MMC host controller via the emulated SCSI layer. This is achieved by ensuring exclusive access to the host controller for one process during any MMC command and during a sequence of commands at the sdmmc(4) layer. While at it, the command processing thread has been moved to sdmmc(4), so as to simplify the implementation of future host controller drivers. This should also pave the way for further cleanup of the code and for new drivers. Minor cleanups are included in this commit, as well.
* - Assign RCAs beginning at 1 since 0 is used to deselect all cards.uwe2006-06-291-2/+9
| | | | | - Always set the "SDIO function 0" pointer to something, even if it is a memory-only card to avoid further special cases in SDIO drivers.
* SDIO card identificationuwe2006-06-011-22/+128
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* don't #undef SDMMC_DEBUGuwe2006-05-281-5/+3
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* Support for standard SD host controllers like the Ricoh 5C822, a smalluwe2006-05-281-0/+243
generic bus layer, and SCSI emulation for SD/MMC memory cards.
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