| Commit message (Collapse) | Author | Age | Files | Lines |
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is detected, simply keep track of the faulty xfer instead of completing
all the pending ones.
Fix a race condition where we could end up aborting a freshly enqueued
xfer when two different threads are submitting control transfers (i.e.
usbdevs(8) and a kernel driver).
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order to read last TRB of the event ring.
Fix a bug introduced in r1.1.
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bus_dmamap_unload(9) on a map that failed to load is a bad idea and causes
panics on some architectures (such as sparc64).
ok mpi@
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This is a workaround needed at least by Renesas controllers. I didn't
find any documentation about this issue and I guess other open source
xHCI implementations do not see this race because they do much more work
upon resume.
Thanks to Remi Locherer for reporting this issue on bugs@.
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the stack. This will allow stricter checks when aborting transfers.
While here update a comment about short transfer and multi-TRB TD since
bulk transfers can also use a chain now.
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4.11.2.4 instead of using one TRB per packet. Also make sure that
it is not greater than 31.
While here be paranoid about xfer buffer crossing a 64k boundary
and use a supplementary TRB in such case.
Fix a problem with uplcom(4) on Intel xHCI reported by jasper@.
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Chain TRBs when submitting bulk or interrupt transfers with a length
bigger than the Maxium Packet Size of the endpoint.
Append a supplementary TRB if a zero length packet is required.
While here, set the flags of each TRB at once. Even if this driver
implementation fills the first TRB of a chain last, be safe and make
sure the hardware wont miss any flag.
Note that with this change, DMA sync operations might not cover the
whole chain, just like for control transfers, if the ring is starting
over.
Previous version of this diff tested by Peter N. M. Hansteen, thanks!
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ok dlg@ mpi@ bcook@ millert@ miod@
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Since xhci(4) does not allocate memory for its rings in interrupt
context, it has no use for the free lists offered by the USB memory
allocator.
Using bus_dmamem_alloc(9) and friends also allows us to respect the
boundary requirement for the various structures specified in Table 54.
While here make use of defines for every alignment and boundary
requirements which are different than a page size.
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dequeue pointer past the last enqueued TRB and let xhci_xfer_done()
properly accounts free TRBs.
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As explained in section 4.11.7 it should be used when a device is
allowed to supply less data than the provided buffer space.
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a different index value for a chained TRB and a freed one.
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when submitting a command. No change for non-XHCI_DEBUG kernel.
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1. Always unmask the slot context for the "Set Address" command.
2. Use the right spl when submitting a transfer to prevent from
setting up a timer on an already completed xfer.
Analyzed with and ok jsg@
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the second "Set Address" command is issued. This would lead the
HC to reprocess TRBs corresponding to completed transfers.
This was the cause of the "xhci0: NULL xfer pointer" message that
could be seen after attaching a device and reported by naddy@.
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This code is violating various layers of abstraction, just like ehci(4)
does. Transaction translators need a bit more love.
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Some Low/Full speed devices do not like to get a SET_ADDRESS command
before we have read (some bits of) their device descriptor. So change
the attach logic to issue two "Device Address" command with a BSR dance.
This should fix the "device problem, disabling port" error seen on root
hubs with some Low/Full speed devices, reported by miod@.
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context, not the whole array of endpoints. Yeah, pointers are hard.
Fix a panic reported by Dimitris Papastamos on tech@
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xHCI specification r1.1 are handled in this implementation. This is a
bit tricky because our bus interface is pipe-oriented. Hopefully this
will help other people squash the remaining bugs in this area.
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protection.
Fix a panic reported by Patrick Wildt.
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work with xhci(4).
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might be NULL. Prevent from crashing in this case 8)
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Even if it's very handy to know where a thread is sleeping in order to
debug HC drivers, users might not like to have to restart their machine
if a transfer timed and nothing will wakeup the discovery thread.
Note that I still haven't seen any hardware timeout in all my tests.
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Patrick Wildt.
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Express Card is plugged with USB devices on it.
While here do not print an unitialized error value if xhci_init() fails,
from Patrick Wildt.
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not enough to attach Super Speed devices below USB 3 hubs, but we're
getting there.
While here reset `acten` when re-enqueuing an interrupt transfers.
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transfer. While here remove/fix other XXXs.
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error. Makes Intel Series 7 controllers happy and no longer report an
illegal context state transition when detaching devices.
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it to the stack when a Short Transfer condition is reported.
In this dummy implementation the ``Event Data TRB'' of a read control
transfer is the only TRB that can trigger an interrupt without being
the last TRB of a transfer. This is done in order to report the
remaining length of a short transfer. But when that happens, we want
to wait until all Transfer TRBs are completed before passing the xfer
to the stack.
Note that clearing the ISP and IOC flags in all Transfer TRBs like it
is specified in 4.10.1.1.1 might not work in our cases because the HC
has most of the time already processed all Transfer TRBs when the driver
dequeues the events in the softinterrupt path.
While here, use the right spl protection when aborting a xfer.
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have a separate function anymore, it is just a wrapper around the "set
address" command.
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with the correct ipl to prevent your CPU from locking against itself.
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in every HC driver.
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the moment only Super and High Speed devices are properly recognized.
Some TT love is required for Full and Low speed devices.
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Since asynchronous commands can be submitted from interrupt context
it was possible to race with a process waiting for the completion of
a previously submitted command. So stop relying on the per-softc
TRB pointer for asynchronous commands and simply get the address of
the command TRB from the event TRB.
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time payload. Super speed companion descriptor are still not used but
at least we can properly initialize super speed interrupt pipes.
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transfer stalled, report that a stall happen because umass(4) relies
on this behavior...
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We return earlier if the interrupt is masked.
Discussed with and okay mpi@
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does not match the hardware address.
This change only matters for xHCI buses where the controller assigns
device addresses. But it is the simplest way to comply with the stack
requirement of assigning the first `logical' address to the root hub
device.
Device addresses are not much used anyway and a cleanup will follow to
avoid possible confusions.
This makes usbdevs(8) correctly report devices connected to xhci(4).
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address, kill some no longer true comments and create a proper
function to assign an address.
For the moment, an address is assigned when setting up a slot for a
new device.
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the ring is halted.
Do not bother reporting USBD_STALLED to the stack like other HC drivers
do since the endpoint is automatically reseted. What is the point of
this error apart from making sure driver authors will forget to call
usbd_clear_endpoint_stall_async() correctly?
The Renesas uPD720202 xHCI, provided by Stefan Wollny, now works as
expected.
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This leak is similar to the public xfer leak #1 that was affecting
device interrupt pipes except that root hubs are rarely detached.
Note that this xfer is never associated to any TD and is just used
to indicate that some of the HC ports has changed status, so there
is no need to flag it as "done" before completing it.
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per-driver pool(9) instead.
With inputs from mikeb@
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call tsleep(9) on resume. deraadt@ pointed that this not needed
for powerdown since `cold' is set.
Another approach would be to call delay() directly in the reset
functions, but let stay coherent with the other HC drivers.
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reported by brad@.
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obviously time out. That is what happen when pipes are closed after
unplugging an xhci(4) express card for example. In such case, make
sure the command TRB is reset.
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