| Commit message (Collapse) | Author | Age | Files | Lines |
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ok semarie@
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interrupts. Hence, update the link state manually.
Tested and ok bluhm@
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devices whose INQUIRY command succeeds but with a residue equal to the
requested bytes. Subsequent i/o's (including the INQUIRY) which succeed
with a residue equal to the requested bytes will have residue set to 0.
Fixes (very?) old devices such as the memory stick Andrew Daugherity
pulled out of his drawer and with which he hoped to install 6.8.
Subsequent testing of diffs much appreciated!
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until the root cause is found. ok kevlo@ kettenis@
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ok patrick@, jsg@
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(CPU) address of the device. Pointed out by miod@
ok patrick@
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behaviour of Linux' implementation: arm64's bus space operations
have no barriers, so while Linux' iowrite32/ioread32 explicitly
contain barriers, using bus space read/write is not enough on arm64.
Add read barriers after a read to make sure that all reads have
completed before the following reads. Add write barriers before a
write to make sure all previous writes have completed before that
write. This fixes panics on the HoneyComb LX2K with amdgpu(4).
ok kettenis@
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initial diff from and ok visa@
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ok kettenis@
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in preparation for upcoming ACPI-attachment.
ok kettenis@
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promiscuous mode.
ok gerhard@
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ok jsg@
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simple device that simply reacts to interrupts by invoking _EVT with the
interrupt number. This is used on the HoneyComb LX2K to implement power
button handling.
ok kettenis@
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PCHs. With help from James Hastings.
ok deraadt@
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only call it when the first drm(4) instance attaches. Also add a cleanup
function that gets called when the last drm(4) instance detaches.
This makes sure that statically initialized IDR instances always work.
ok jsg@, semarie@
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ok kettenis@
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always matched on an FDT-capable device, but the HoneyComb LX2K seems
to have a PCA9547 and provides it as NXP0002 HID. This means we know
if it's ACPI or FDT based on the name passed. This is required to be
able to make two acpitz(4) nodes work, since the thermel sensors are
behind the mux.
ok kettenis@
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own clock divisor table and its registers are each a byte apart.
The status register is write 1 to clear instead of write 0 to clear,
and the enable bit is also inverted.
ok kettenis@
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Flag into their own functions, since these are the two single pieces
of register content that behave differently on the VF610.
ok kettenis@
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IDA functions in terms of IDR. Fixes issues with running out of PASIDs
in amdgpu(4).
ok jsg@
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work. The "double shot" model needs more work (support for "clause 45"
PHYs).
ok patrick@
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ok patrick@
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Spotted thanks to debugging work by semarie@
ok jsg@, semarie@
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in reset which prevents it from working.
ok patrick@
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a pointer in the softc instead of using a hardcoded table. While there
move the call to retrieve the clock frequency into the attach code, and
store the value in the softc as well. This will allow a future ACPI
attachment driver to supply its value in different fashion.
ok kettenis@
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structs.
ok kettenis@
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difference is that is uses a different bRequest value for READ/WRITE.
Apart from that the flow control bits are in a different register
and resetting the data pipes uses different bits as well. We can
check if its an HXN by reading an HX-only register and checking for
a fail.
ok kettenis@
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variable so that read/write can calculate the correct register offset.
ok kettenis@
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reserved. It is fine to use byte-wide access on those registers, which
will be necessary to support VF610.
Tested on i.MX6 by kettenis@ and on i.MX8MQ by myself
ok kettenis@
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the PCA954[68], this is a mux instead of a switch and can only have
one active channel at a time. On the bright side, we treat switches
like a mux, so only the bits have to be set a little bit differently.
ok kettenis@
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status updates in that case. This probably won't work properly on the 10G
ports of the MACCHIATOBin "double shot" model, but makes all SFP cages
work on the "single shot" model.
ok patrick@
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ok patrick@
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async task(s).
Makes dhclient(8) much happier.
Suggestions and ok stsp@, jmatthew@
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