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* Print feature that indicates a CPU core supports 16-bit ASIDs.kettenis2021-03-041-1/+13
| | | | ok patrick@
* Tweak whitespace and adjust prototypes.visa2021-03-041-23/+21
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* Combine octeon_pcibusvar.h into octeon_pcibus.c to reduce scatter.visa2021-03-042-56/+9
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* Update clock interrupt count atomically.visa2021-03-041-2/+4
| | | | | This avoids errors that can arise when multiple cores update the variable at the same time.
* Merge issignal() and CURSIG() in preparation for turning it mp-safe.mpi2021-03-044-29/+26
| | | | | | This makes appear some redundant & racy checks. ok semarie@
* Modify `uvmexp.swpgonly' atomically, required for uvm_fault() w/o KERNEL_LOCK()mpi2021-03-046-17/+24
| | | | ok kettenis@
* Bring back previous fix for UVM vnode deadlock.mpi2021-03-043-49/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | tb@ reports that refaulting when there's contention on the vnode makes firefox start very slowly on his machine. To revisit when the fault handler will be unlocked. ok anton@ Original commit message: Fix a deadlock between uvn_io() and uvn_flush(). While faulting on a page backed by a vnode, uvn_io() will end up being called in order to populate newly allocated pages using I/O on the backing vnode. Before performing the I/O, newly allocated pages are flagged as busy by uvn_get(), that is before uvn_io() tries to lock the vnode. Such pages could then end up being flushed by uvn_flush() which already has acquired the vnode lock. Since such pages are flagged as busy, uvn_flush() will wait for them to be flagged as not busy. This will never happens as uvn_io() cannot make progress until the vnode lock is released. Instead, grab the vnode lock before allocating and flagging pages as busy in uvn_get(). This does extend the scope in uvn_get() in which the vnode is locked but resolves the deadlock. ok mpi@ Reported-by: syzbot+e63407b35dff08dbee02@syzkaller.appspotmail.com
* off by onejsg2021-03-031-2/+2
| | | | ok claudio@ deraadt@
* Remove bogus (and pointless) pmap_activate(9) call.kettenis2021-03-031-3/+1
| | | | ok drahn@
* Add a configurable button mapping for tap gestures on touchpads.bru2021-03-032-22/+47
| | | | | | Thanks to RJ Johnson for this work! ok mpi@
* clean up span ports as span ports, not bridge ports.dlg2021-03-031-3/+2
| | | | | | | | | the visible result of this is that span ports aren't made promisc like bridge ports. when cleaning up a span port, trying to take promisc off it screwed up the refs, and it makes the underlying interface not able to be promisc when it should be promisc. found by dave voutila
* fix an assert in veb_p_ioctl() that failed when called by a span port.dlg2021-03-021-3/+4
| | | | | | | | | veb_p_ioctl() is used by both veb bridge and veb span ports, but it had an assert to check that it was being called by a veb bridge port. this extends the check so using it on a span port doesnt cause a panic. found by dave voutila
* include of netinet/in.h here is incorrect, because net/route.h will pullderaadt2021-03-021-2/+1
| | | | | excessive types into scope. ok claudio
* Fix the deadlock between uvn_io() and uvn_flush() by restarting the fault.mpi2021-03-022-5/+10
| | | | | | | | | Do not allow a faulting thread to sleep on a contended vnode lock to prevent lock ordering issues with upcoming per-uobj lock. ok anton@ Reported-by: syzbot+e63407b35dff08dbee02@syzkaller.appspotmail.com
* Revert the fix for the deadlock between uvn_io() and uvn_flush().mpi2021-03-022-95/+44
| | | | | | | | This fix (ab)use the vnode lock to serialize access to some fields of the corresponding pages associated with UVM vnode object and this will create new deadlocks with the introduction of a per-uobj lock. ok anton@
* Do *not* delay while waiting for IOTLB invalidation to complete. A 1mspatrick2021-03-021-3/+1
| | | | | | | delay is awful in a hot path, and the SMMU is actually quite quick on invalidation, so simply removing the delay is worth a thousand roses. Found with mental support from dlg@ (and btrace)
* Update the MSI addresses for the Armada 8040. This chunk will only bepatrick2021-03-011-3/+7
| | | | there until we have a proper way of making the MSI pages available.
* Instead of sprinkling the device's DMA tag, always return a new DMA tagpatrick2021-03-013-41/+33
| | | | | | | | | | which is based on the IOMMU's. If you think about it, using the IOMMU's DMA tag makes more sense because it is the IOMMU that does the actual DMA. Noticed while debugging, since the SMMU's map function was called twice: once for the PCI device, and once for its ppb(4). As the transaction has the PCI device's Stream ID, not the ppb(4)'s, this would be useless work. Suggested by kettenis@
* Transactions on the AXI bus contain a Stream ID. SMMUs filterpatrick2021-03-011-1/+15
| | | | | | | | | | | | | | | based on Stream IDs. On the Armada 8040 these Stream IDs can be configured in different registers. The PCIe controller has a register which maps root port, bus, dev and func number to the Stream ID. This should be set up by TF-A firmware, but on the 8040 the current images don't do this. For chips with more than one PCIe controller this register must be setup correctly depending on the implementation, but on the 8040 there only is one controller, so we can configure a fixed value to match what is defined in the device tree. This allows the SMMU to properly track the PCIe controller's transactions. ok kettenis@
* The ep-gpios property is optional on the Rockchip PCIe controller.patrick2021-03-011-11/+21
| | | | | | | | While there, enable the different voltage regulators and set the PHY's assigned clocks. This makes PCIe work on the NanoPi R4S. Tested by kurt@ on Rock Pi N10 and ROCKPro64 ok kurt@ kettenis@
* Refactor ip_fragment() and ip6_fragment(). Use a mbuf list tobluhm2021-03-018-197/+165
| | | | | | | | | | simplify the handling of the fragment list. Now the functions ip_fragment() and ip6_fragment() always consume the mbuf. They free the mbuf and mbuf list in case of an error and take care about the counter. Adjust the code a bit to make v4 and v6 look similar. Fixes a potential mbuf leak when pf_route6() called pf_refragment6() and it failed. Now the mbuf is always freed by ip6_fragment(). OK dlg@ mvs@
* If an anon is associated with a page, acquire its lock before any modification.mpi2021-03-011-3/+34
| | | | | | | This change should have been part of the previous anon-locking diff and is necessary to run the top part of uvm_fault() unlocked. ok jmatthew@
* Move the top part of uvm_fault_lower(), the lookup, in its own function.mpi2021-03-011-76/+98
| | | | | | | | | The name and logic come from NetBSD in order to reduce the difference between the two code bases. No functional change intended. ok tb@
* Have acpipci(4) look for a matching SMMU in the IORT.patrick2021-02-281-1/+69
| | | | ok kettenis@
* Enable acpiiort(4), add smmu(4) but keep disabled.patrick2021-02-282-2/+8
| | | | ok kettenis@
* acpiiort(4) and smmu(4)patrick2021-02-281-1/+14
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* Add smmu(4), a driver the ARM System MMU. This IOMMU is basically apatrick2021-02-285-0/+2008
| | | | | | | | | | | | | | | | | | regular ARM CPU MMU re-used for I/O devices. Implementations can have a mix of stage-2 only and stage-2/stage-2 context blocks (domains). The IOMMU allows different ways of grouping devices into a single domain. This implementation only supports SMMUv2, since there is basically no relevant SMMUv1 hardware. It also only supports AArch64 pagetables, the same as our pmap. Hence lots of code was taken from there. There is no support for 32-bit pagetables, which would have also been needed for SMMUv1 support. I have not yet seen any machines with SMMUv3, which will probably need a new driver. There is some work to be done, but the code works and it's about time it hits the tree. ok kettenis@
* Add acpiiort(4), a driver for the ACPI I/O Remapping Table. This tablepatrick2021-02-282-0/+138
| | | | | | contains information which IOMMUs we have and how the devices are routed. ok kettenis@
* Add memory attributes for stage-2 pagetables.patrick2021-02-281-1/+7
| | | | ok kettenis@
* Issue call to IOMMU OFW API to collect an IOMMU-sprinkled DMA tag.patrick2021-02-282-2/+9
| | | | ok kettenis@
* Implement IOMMU OFW API for on-SoC/non-PCI devices.patrick2021-02-282-2/+46
| | | | ok kettenis@
* Issue call to IOMMU OFW API to collect an IOMMU-sprinkled DMA tag.patrick2021-02-282-2/+15
| | | | ok kettenis@
* big numbers need suffixes on some platforms. fix LACP_ADDR_SLOW_E64.dlg2021-02-281-2/+2
| | | | deraadt@ says i broke hppa :(
* apldart(4) is needed here as well.kettenis2021-02-271-1/+2
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* Add apldart(4), a driver for the IOMMU on Apple M1 SoCs.kettenis2021-02-273-2/+567
| | | | ok patrick@
* Replace stray direct call of f_event with filter_event().visa2021-02-271-2/+2
| | | | | This does not change the current behaviour, but filterops should be invoked through filter_*() for consistency.
* Rework route_input() and rtm_sendup(). While we perform foreach loopmvs2021-02-271-32/+12
| | | | | | | | | | | | | in route_input() we drop solock() after we checked socket state. We pass mbuf(9) to this socket at next loops, while it referenced as `last'. Socket's state could be changed by concurrent thread while it's not locked. Since we perform socket's checks and output in same iteration, the logic which prevents mbuf(9) chain copy for the last socket in list was removed. ok bluhm@ claudio@
* trim some code i accidentally left into the nvgre add address functiondlg2021-02-271-4/+1
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* recover scope from v6 nvgre endpoint addresses for userland to look at.dlg2021-02-271-2/+2
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* regenjsg2021-02-272-55/+55
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* sort and fix RTL8713 idjsg2021-02-271-12/+12
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* regenjsg2021-02-272-14/+14
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* sortjsg2021-02-271-5/+5
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* regenjsg2021-02-272-32/+312
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* add ids for Intel Xeon Scalablejsg2021-02-271-7/+63
| | | | | | | | | | | | | | | Used by at least Skylake-SP (SKX) and Cascade Lake-SP (CLX). Covers Xeon Scalable, Xeon D, Xeon W, Core Extreme/Core X product families. The Scalable parts are marketed as Xeon Bronze, Silver, Gold and Platinum. As most of these ids are not described in public documents from Intel use Skylake-ESystem.inf and KabyLakePCH-HSystem.inf from Intel's Windows drivers to get an idea of what the names should be. With the name for 0x2088 found in a Intel authored Linux driver. Initial patch and much discussion from Karel Gardas.
* put the mac addr into a uint64_t to compare it to the ethernet slow addr.dlg2021-02-271-5/+9
| | | | also do the ethertype comparison before the conversion above.
* Read and parse OTP on the BCM4378. There are quite a few firmware andpatrick2021-02-262-2/+138
| | | | | | | nvram files used for the different Apple devices. The device tree and the OTP hold the information which of those we will have to use. For now this information will simply be printed, but depending on how we choose to do the firmare distribution we could use it for loadfirmware().
* Attach to BCM4378.patrick2021-02-261-1/+2
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* Add support for BCM4378 as implemented on the Apple M1. This chip seemspatrick2021-02-262-26/+126
| | | | | | | | to use a different set of PCIE2REG registers. Accessing the "old" ones even leads to faults. There are two surprises though. One is that it seems that the interrupt status register always returns 0, and the other one is that we receive the interrupts way too early, but both can be worked around for now.
* touch pcidevs again to generated new rcs ids in headersjan2021-02-262-2/+2
| | | | advince from sthen@
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