diff options
| author |   Ben Skeggs <bskeggs@redhat.com> | 2013-11-28 12:37:56 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-01-23 13:38:52 +1000 |
| commit | 1e1d6b4c530350802a3aacd2a702631cef66fcaa (patch) | |
| tree | e8e180a99031146e832f3de8209edeefac6c67f6 | |
| parent | drm/nve0/fb/gddr5: fix calculation of RDQS setting (diff) | |
drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c index 409c74e6ed77..ee8ac5ba22c8 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c @@ -105,5 +105,9 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts) ram->mr[7] |= (vr & 0x01) << 8; ram->mr[7] |= (vh & 0x01) << 7; ram->mr[7] |= (lf & 0x01) << 3; + + ram->mr[8] &= ~0x003; + ram->mr[8] |= (WR & 0x10) >> 3; + ram->mr[8] |= (CL & 0x10) >> 4; return 0; } |