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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-09-09 11:53:53 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-09-18 14:53:34 +0200
commit77643815b019d3e78b2ca028d701f95df58e7cf3 (patch)
treecd092a410c5c4533f3cae9c17ee0542bf6092676 /arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
parentarm64: dts: renesas: r8a779g0: Add I2C nodes (diff)
downloadlinux-dev-77643815b019d3e78b2ca028d701f95df58e7cf3.tar.xz
linux-dev-77643815b019d3e78b2ca028d701f95df58e7cf3.zip
arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMs
Enable the I2C0 bus on the White Hawk CPU board, and describe the I2C EEPROMs present on the White Hawk CPU and BreakOut boards. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d01cada6f2d3e44dd6cb26cfa8e4ce6382f1fbff.1662715538.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
index ba8cc162076c..27daba944a33 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
@@ -40,6 +40,21 @@
status = "okay";
};
+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ eeprom@50 {
+ compatible = "rohm,br24g01", "atmel,24c01";
+ label = "cpu-board";
+ reg = <0x50>;
+ pagesize = <8>;
+ };
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
@@ -49,6 +64,11 @@
function = "hscif0";
};
+ i2c0_pins: i2c0 {
+ groups = "i2c0";
+ function = "i2c0";
+ };
+
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";