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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-11-30 17:18:00 +0000 |
|---|---|---|
| committer |   Will Deacon <will.deacon@arm.com> | 2018-12-06 11:47:44 +0000 |
| commit | c9460dcb06ee68af1c75f9232603ece071901abe (patch) | |
| tree | 2871014a31ffba5e22232174dcb64810f95e6111 /arch/arm64/include/asm/cputype.h | |
| parent | arm64: relocatable: fix inconsistencies in linker script and options (diff) | |
| download | linux-dev-c9460dcb06ee68af1c75f9232603ece071901abe.tar.xz linux-dev-c9460dcb06ee68af1c75f9232603ece071901abe.zip | |
arm64: capabilities: Merge entries for ARM64_WORKAROUND_CLEAN_CACHE
We have two entries for ARM64_WORKAROUND_CLEAN_CACHE capability :
1) ARM Errata 826319, 827319, 824069, 819472 on A53 r0p[012]
2) ARM Errata 819472 on A53 r0p[01]
Both have the same work around. Merge these entries to avoid
duplicate entries for a single capability. Add a new Kconfig
entry to control the "capability" entry to make it easier
to handle combinations of the CONFIGs.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cputype.h')
| -rw-r--r-- | arch/arm64/include/asm/cputype.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 12f93e4d2452..2e26375bb753 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -151,6 +151,7 @@ struct midr_range { .rv_max = MIDR_CPU_VAR_REV(v_max, r_max), \ } +#define MIDR_REV_RANGE(m, v, r_min, r_max) MIDR_RANGE(m, v, r_min, v, r_max) #define MIDR_ALL_VERSIONS(m) MIDR_RANGE(m, 0, 0, 0xf, 0xf) static inline bool is_midr_in_range(u32 midr, struct midr_range const *range) |