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path: root/arch/arm64/include/asm/cputype.h (follow)
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2022-11-09arm64: Fix bit-shifting UB in the MIDR_CPU_MODEL() macroD Scott Phillips1-1/+1
2022-10-12arm64: Add AMPERE1 to the Spectre-BHB affected listD Scott Phillips1-0/+4
2022-05-26Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds1-0/+8
2022-05-15KVM: arm64: vgic-v3: List M1 Pro/Max as requiring the SEIS workaroundMarc Zyngier1-0/+8
2022-05-04arm64: cputype: Avoid overflow using MIDR_IMPLEMENTOR_MASKMichal Orzel1-1/+1
2022-04-08arm64: Add part number for Arm Cortex-A78AEChanho Park1-0/+2
2022-03-14Merge branch 'for-next/spectre-bhb' into for-next/coreWill Deacon1-0/+8
2022-03-07irqchip/gic-v3: Workaround Marvell erratum 38545 when reading IARLinu Cherian1-0/+13
2022-02-24arm64: Mitigate spectre style branch history side channelsJames Morse1-0/+8
2022-01-28Merge tag 'trbe-cortex-a510-errata' of gitolite.kernel.org:pub/scm/linux/kernel/git/coresight/linux into for-next/fixesCatalin Marinas1-0/+2
2022-01-27arm64: Add Cortex-A510 CPU part definitionAnshuman Khandual1-0/+2
2022-01-24arm64: Add Cortex-X2 CPU part definitionAnshuman Khandual1-0/+2
2021-10-21arm64: Add Neoverse-N2, Cortex-A710 CPU part definitionSuzuki K Poulose1-0/+4
2021-04-08arm64: cputype: Add CPU implementor & types for the Apple M1 coresHector Martin1-0/+6
2020-11-13arm64: Add MIDR value for KRYO2XX gold/silver CPU coresKonrad Dybcio1-0/+4
2020-10-29arm64: Add part number for Arm Cortex-A77Rob Herring1-0/+2
2020-07-03arm64: Add MIDR value for KRYO4XX gold CPU coresSai Prakash Ranjan1-0/+2
2020-01-17arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe listSai Prakash Ranjan1-0/+4
2019-11-01arm64: apply ARM64_ERRATUM_845719 workaround for Brahma-B53 coreDoug Berger1-0/+2
2019-08-07arm64/prefetch: fix a -Wtype-limits warningQian Cai1-10/+11
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner1-12/+1
2019-04-30arm64: Add part number for Neoverse N1Marc Zyngier1-0/+2
2019-03-19arm64: Add MIDR encoding for HiSilicon Taishan CPUsHanjun Guo1-0/+4
2019-03-19arm64: apply workaround on A64FX v1r0Mark Rutland1-1/+1
2019-02-28arm64: Add workaround for Fujitsu A64FX erratum 010001Zhang Lei1-0/+9
2018-12-06arm64: capabilities: Merge duplicate Cavium erratum entriesSuzuki K Poulose1-0/+1
2018-12-06arm64: capabilities: Merge entries for ARM64_WORKAROUND_CLEAN_CACHESuzuki K Poulose1-0/+1
2018-10-01arm64: arch_timer: Add workaround for ARM erratum 1188873Marc Zyngier1-0/+2
2018-05-09arm64: Add MIDR encoding for NVIDIA CPUsDavid Gilhooley1-0/+6
2018-03-26arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35Suzuki K Poulose1-0/+4
2018-03-26arm64: capabilities: Add support for checks based on a list of MIDRsSuzuki K Poulose1-0/+9
2018-03-26arm64: Add helpers for checking CPU MIDR against a rangeSuzuki K Poulose1-0/+30
2018-02-19arm64: Fix compilation error while accessing MPIDR_HWID_BITMASK from .S filesBhupesh Sharma1-1/+1
2018-02-17arm64: cputype: Silence Sparse warningsRobin Murphy1-1/+1
2018-01-30Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds1-0/+9
2018-01-14arm64: cpu_errata: Add Kryo to Falkor 1003 errataStephen Boyd1-0/+2
2018-01-08arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUsJayachandran C1-0/+3
2018-01-08arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75Will Deacon1-0/+4
2017-12-12arm64: Define cputype macros for Falkor CPUShanker Donthineni1-0/+2
2017-06-15arm64: Add MIDR values for Cavium cn83XX SoCsDavid Daney1-0/+2
2017-04-07arm64: Define Cortex-A73 MIDRMarc Zyngier1-0/+2
2017-01-27arm64: Define Falkor v1 CPUShanker Donthineni1-0/+4
2017-01-13arm64: errata: Provide macro for major and minor cpu revisionsRobert Richter1-0/+3
2016-09-09arm64: sysreg: replace open-coded mrs_s/msr_s with {read,write}_sysreg_sWill Deacon1-5/+1
2016-07-07arm64: Enable workaround for Cavium erratum 27456 on thunderx-81xxGanapatrao Kulkarni1-0/+2
2016-03-20Merge tag 'armsoc-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-0/+3
2016-03-04arm64: make mrs_s prefixing implicit in read_cpuidMark Rutland1-4/+4
2016-02-20arm64: cputype info for Broadcom VulcanJayachandran C1-0/+3
2016-02-18arm64: cpufeature: Change read_cpuid() to use sysreg's mrs_s macroJames Morse1-9/+11
2016-02-16arm64: prefetch: add alternative pattern for CPUs without a prefetcherWill Deacon1-1/+16
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