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| author |   Paul Cercueil <paul@crapouillou.net> | 2021-05-30 17:49:22 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2021-06-27 19:49:18 -0700 |
| commit | b60b0b55926bea93c0f00000ac884fa1b3c9a492 (patch) | |
| tree | 87c2ec2a48364d55fceaf8f965159376cb71ebb9 /drivers/clk/ingenic/cgu.h | |
| parent | clk: ingenic: Remove pll_info.no_bypass_bit (diff) | |
| download | linux-dev-b60b0b55926bea93c0f00000ac884fa1b3c9a492.tar.xz linux-dev-b60b0b55926bea93c0f00000ac884fa1b3c9a492.zip | |
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
SoC-specific code can now provide a callback if they need to compute the
M/N/OD values in a specific way.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: 周琰杰 (Zhou Yanjie)<zhouyanjie@wanyeetech.com> # on CU1000-neo/X1000E
Link: https://lore.kernel.org/r/20210530164923.18134-6-paul@crapouillou.net
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/ingenic/cgu.h')
| -rw-r--r-- | drivers/clk/ingenic/cgu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h index 10521d1b7b12..bfc2b9c38a41 100644 --- a/drivers/clk/ingenic/cgu.h +++ b/drivers/clk/ingenic/cgu.h @@ -55,6 +55,9 @@ struct ingenic_cgu_pll_info { s8 bypass_bit; u8 enable_bit; u8 stable_bit; + void (*calc_m_n_od)(const struct ingenic_cgu_pll_info *pll_info, + unsigned long rate, unsigned long parent_rate, + unsigned int *m, unsigned int *n, unsigned int *od); }; /** |