diff options
| author |   Christophe JAILLET <christophe.jaillet@wanadoo.fr> | 2021-05-01 13:24:32 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2021-06-25 16:08:18 -0700 |
| commit | b9ec1c1f9c1bd0344a34a3309b9cc8eba59d7da8 (patch) | |
| tree | 0f4740e6a12ff7a44a36b27ba20577e4b594cde4 /drivers/clk/zynqmp/pll.c | |
| parent | clk: zynqmp: fix compile testing without ZYNQMP_FIRMWARE (diff) | |
| download | linux-dev-b9ec1c1f9c1bd0344a34a3309b9cc8eba59d7da8.tar.xz linux-dev-b9ec1c1f9c1bd0344a34a3309b9cc8eba59d7da8.zip | |
clk: zynqmp: pll: Remove some dead code
'clk_hw_set_rate_range()' does not return any error code and 'ret' is
known to be 0 at this point, so this message can never be displayed.
Remove it.
Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/71a9fed5f762a71248b8ac73c0a15af82f3ce1e2.1619867987.git.christophe.jaillet@wanadoo.fr
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/zynqmp/pll.c')
| -rw-r--r-- | drivers/clk/zynqmp/pll.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index e025581f0d54..793b950ade09 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -341,8 +341,6 @@ struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id, } clk_hw_set_rate_range(hw, PS_PLL_VCO_MIN, PS_PLL_VCO_MAX); - if (ret < 0) - pr_err("%s:ERROR clk_set_rate_range failed %d\n", name, ret); return hw; } |