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authorLinus Torvalds <torvalds@linux-foundation.org>2019-09-19 14:19:33 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-09-19 14:19:33 -0700
commit3c2edc36a77420d8be05d656019dbc8c31535992 (patch)
tree70d8c9abb04c89e82c79c46efd2f7cb1bf836ef5 /drivers/gpio
parentMerge tag 'tag-chrome-platform-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux (diff)
parentpinctrl: meson-gxbb: Fix wrong pinning definition for uart_c (diff)
downloadlinux-dev-3c2edc36a77420d8be05d656019dbc8c31535992.tar.xz
linux-dev-3c2edc36a77420d8be05d656019dbc8c31535992.zip
Merge tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.4 kernel cycle: Core changes: - Fix errors in example code in the documentation. New drivers: - Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the Ingenic driver. - Support Cirrus Logic Madera CS47L92 and CS47L15. - Support Allwinner Sunxi V3S. - Support Aspeed 2600 BMC. - Support Qualcomm SC7180. - Support Marvell MVEBU CS115. Driver improvements: - Clean up a few drivers to use the devm_platform_ioremap_resource() helper. - Pass the irqchip when registering the gpio_chip in some pin controllers that are also GPIO controllers. - Support suspend/resume in the Tegra driver. - Support pull-up on the Broadcom BCM2711. - The Intel driver can now request locked pads. - Fix the UFS reset pin in the Qualcomm SDM845 driver" * tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits) pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux() pinctrl: bcm: remove redundant assignment to pointer log pinctrl: iproc: Add 'get_direction' support pinctrl: iproc-gpio: Handle interrupts for multiple instances pinctrl: iproc-gpio: Fix incorrect pinconf configurations pinctrl: intel: mark intel_pin_to_gpio __maybe_unused pinctrl: qcom: sdm845: Fix UFS_RESET pin pinctrl: mvebu: add additional variant for standalone CP115 pinctrl: mvebu: Add CP110 missing pin functionality dt-bindings: cp110: document the new CP115 pinctrl compatible pinctrl: bcm2835: Pass irqchip when adding gpiochip pinctrl: meson: meson: Add of_node_put() before return pinctrl/gpio: Take MUX usage into account dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support pinctrl: amd: disable spurious-firing GPIO IRQs pinctrl: rza2: Include the appropriate headers pinctrl: rza2: Drop driver use of consumer flags ...
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpiolib.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 822988818efc..bdbc1649eafa 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1084,7 +1084,8 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
test_bit(FLAG_IS_HOGGED, &desc->flags) ||
test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
test_bit(FLAG_EXPORT, &desc->flags) ||
- test_bit(FLAG_SYSFS, &desc->flags))
+ test_bit(FLAG_SYSFS, &desc->flags) ||
+ !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
if (test_bit(FLAG_IS_OUT, &desc->flags))
lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;