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| author |   Aric Cyr <aric.cyr@amd.com> | 2019-04-22 17:45:11 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:11 -0500 |
| commit | 6bd8d7d3f75be1c327f3fd63e6f03ca68faffb33 (patch) | |
| tree | 16be276e45b389ef84a20669e77291d95fe98bff /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h | |
| parent | drm/amd/display: Add support for extended DSC DPCD caps (diff) | |
| download | linux-dev-6bd8d7d3f75be1c327f3fd63e6f03ca68faffb33.tar.xz linux-dev-6bd8d7d3f75be1c327f3fd63e6f03ca68faffb33.zip | |
drm/amd/display: Intermittent DCN2 pipe hang on mode change
[Why]
GSL is being used to synchronize pipes when vsync is off but
on transition to vsync on during a mode change GSL is not
being reset correctly.
[How]
Disable GSL on any plane that is disabled.
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h index 37699df685ee..b7892e8f4518 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h @@ -86,6 +86,6 @@ void dcn20_setup_vupdate_interrupt(struct pipe_ctx *pipe_ctx); void dcn20_setup_gsl_group_as_lock(const struct dc *dc, struct pipe_ctx *pipe_ctx, - bool flip_immediate); + bool enable); #endif /* __DC_HWSS_DCN20_H__ */ |