diff options
| author |   Jimmy Kizito <Jimmy.Kizito@amd.com> | 2021-04-19 15:12:01 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-06-08 12:19:34 -0400 |
| commit | 0cb1588571a7ba42108f913d0938a3a03a698027 (patch) | |
| tree | ec6b57ede544fab4f0850b3925869ddb8c60636f /drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | |
| parent | drm/amd/display: Revert "Fix clock table filling logic" (diff) | |
| download | linux-dev-0cb1588571a7ba42108f913d0938a3a03a698027.tar.xz linux-dev-0cb1588571a7ba42108f913d0938a3a03a698027.zip | |
drm/amd/display: Expand DP module equalization API.
[Why & How]
Add functionality useful for DP equalization phase of link training to
public interface.
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h index bbb054f58fe2..883c3af51022 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h @@ -130,6 +130,12 @@ bool dp_is_cr_done(enum dc_lane_count ln_count, enum link_training_result dp_get_cr_failure(enum dc_lane_count ln_count, union lane_status *dpcd_lane_status); +bool dp_is_ch_eq_done(enum dc_lane_count ln_count, + union lane_status *dpcd_lane_status); +bool dp_is_symbol_locked(enum dc_lane_count ln_count, + union lane_status *dpcd_lane_status); +bool dp_is_interlane_aligned(union lane_align_status_updated align_status); + bool dp_is_max_vs_reached( const struct link_training_settings *lt_settings); @@ -137,6 +143,8 @@ void dp_update_drive_settings( struct link_training_settings *dest, struct link_training_settings src); +uint32_t dp_translate_training_aux_read_interval(uint32_t dpcd_aux_read_interval); + enum dpcd_training_patterns dc_dp_training_pattern_to_dpcd_training_pattern( struct dc_link *link, |