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| author |   Clint Taylor <clinton.a.taylor@intel.com> | 2021-06-08 10:47:21 -0700 |
|---|---|---|
| committer |   José Roberto de Souza <jose.souza@intel.com> | 2021-06-15 13:17:50 -0700 |
| commit | 8c209f42cb3a209c366bae2956c98d8ed0514773 (patch) | |
| tree | 6d80636590972a51bc0b105282399f29f1bc4297 /drivers/gpu/drm/i915/display/intel_dpll_mgr.c | |
| parent | drm/i915: Simplify userptr locking (diff) | |
| download | linux-dev-8c209f42cb3a209c366bae2956c98d8ed0514773.tar.xz linux-dev-8c209f42cb3a209c366bae2956c98d8ed0514773.zip | |
drm/i915/adl_p: Add initial ADL_P Workarounds
Most of the context WA are already implemented.
Adding adl_p platform tag to reflect so.
v2: adjust comments for clarity (MattR)
BSpec: 54369
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608174721.17593-1-clinton.a.taylor@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 71ac57670043..882bfd499e55 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -2667,7 +2667,7 @@ static bool cnl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state) } /* - * Display WA #22010492432: ehl, tgl + * Display WA #22010492432: ehl, tgl, adl-p * Program half of the nominal DCO divider fraction value. */ static bool @@ -2675,7 +2675,7 @@ ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915) { return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) && IS_JSL_EHL_REVID(i915, EHL_REVID_B0, REVID_FOREVER)) || - IS_TIGERLAKE(i915)) && + IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) && i915->dpll.ref_clks.nssc == 38400; } |