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author | José Roberto de Souza <jose.souza@intel.com> | 2022-03-30 08:57:24 -0700 |
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committer | José Roberto de Souza <jose.souza@intel.com> | 2022-03-30 13:34:46 -0700 |
commit | 47e794d69c0d8a4a1ff91fcb6e3d69bc38fcfef2 (patch) | |
tree | 2dad059d268b1c3b70bfa44937896db98db92e0f /drivers/gpu/drm/i915/intel_pm.h | |
parent | drm/i915/display/adlp: Adjust MBUS DBOX BW and B credits (diff) | |
download | linux-dev-47e794d69c0d8a4a1ff91fcb6e3d69bc38fcfef2.tar.xz linux-dev-47e794d69c0d8a4a1ff91fcb6e3d69bc38fcfef2.zip |
drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL
PIPE_MBUS_DBOX_CTL was only being programmed when a pipe is being
enabled but that could potentially cause issues as it could have
mismatching values while pipes are being enabled.
So here moving the PIPE_MBUS_DBOX_CTL programming of all pipes to be
executed before the function that enables all pipes, leaving all pipes
with a matching A_CREDIT value.
While at it, also moving it to intel_pm.c as we are trying to reduce
the gigantic size of intel_display.c and intel_pm.c have other MBUS
programing sequences.
v2:
- do not program PIPE_MBUS_DBOX_CTL if pipe will not be active or
when it do not needs modeset
- remove the checks to wait a vblank
v3:
- checking if dbuf state is present in state before using it
v4:
- removing redundant checks
- calling intel_atomic_get_new_dbuf_state instead of
intel_atomic_get_dbuf_state
BSpec: 49213
BSpec: 50343
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220330155724.255226-3-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h index 51705151b842..50604cf7398c 100644 --- a/drivers/gpu/drm/i915/intel_pm.h +++ b/drivers/gpu/drm/i915/intel_pm.h @@ -94,5 +94,6 @@ intel_atomic_get_dbuf_state(struct intel_atomic_state *state); int intel_dbuf_init(struct drm_i915_private *dev_priv); void intel_dbuf_pre_plane_update(struct intel_atomic_state *state); void intel_dbuf_post_plane_update(struct intel_atomic_state *state); +void intel_mbus_dbox_update(struct intel_atomic_state *state); #endif /* __INTEL_PM_H__ */ |