aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_pm.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä1-60/+5
2022-08-31drm/i915: move dbuf under display sub-structJani Nikula1-2/+2
2022-06-17drm/i915/wm: move wm state verification to intel_pm.cJani Nikula1-12/+2
2022-03-30drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTLJosé Roberto de Souza1-0/+1
2022-02-07drm/i915: Workaround broken BIOS DBUF configuration on TGL/RKLVille Syrjälä1-0/+1
2022-02-02drm/i915: Only include i915_reg.h from .c filesMatt Roper1-1/+0
2021-09-29drm/i915/wm: provide wrappers around watermark vfuncs calls (v3)Dave Airlie1-1/+0
2021-09-29drm/i915: make update_wm take a dev_priv.Dave Airlie1-1/+1
2021-08-20drm/i915/pm: use forward declaration to remove an includeJani Nikula1-1/+1
2021-05-26drm/i915: Remove the repeated declarationShaokun Zhang1-2/+0
2021-05-19drm/i915/adl_p: MBUS programmingVandita Kulkarni1-1/+1
2021-04-21drm/i915: Polish for_each_dbuf_slice()Ville Syrjälä1-1/+0
2021-04-21drm/i915: Store dbuf slice mask in device infoVille Syrjälä1-0/+1
2021-03-03drm/i915: Check tgl+ SAGV watermarks properlyVille Syrjälä1-0/+5
2021-01-26drm/i915: Encapsulate dbuf state handling harderVille Syrjälä1-0/+2
2021-01-26drm/i915: Add pipe ddb entries into the dbuf stateVille Syrjälä1-0/+4
2021-01-26drm/i915: Introduce intel_dbuf_slice_size()Ville Syrjälä1-1/+0
2020-09-28drm/i915: Make intel_{enable,disable}_sagv() staticVille Syrjälä1-2/+0
2020-05-22drm/i915: Fix includes and local vars orderStanislav Lisovskiy1-1/+1
2020-05-21drm/i915: Adjust CDCLK accordingly to our DBuf bw needsStanislav Lisovskiy1-0/+4
2020-05-16drm/i915: Move the dbuf pre/post plane updateVille Syrjälä1-0/+2
2020-05-16drm/i915: Nuke skl_ddb_get_hw_state()Ville Syrjälä1-1/+0
2020-05-16drm/i915: Introduce proper dbuf stateVille Syrjälä1-0/+22
2020-05-13drm/i915: Make active_pipes check skl specificStanislav Lisovskiy1-1/+2
2020-05-04drm/i915: Use bw state for per crtc SAGV evaluationStanislav Lisovskiy1-1/+2
2020-04-17drm/i915: Add pre/post plane updates for SAGVStanislav Lisovskiy1-0/+2
2020-02-05drm/i915: Manipulate DBuf slices properlyStanislav Lisovskiy1-1/+1
2020-02-05drm/i915: Remove skl_ddl_allocation structStanislav Lisovskiy1-3/+2
2019-12-04drm/i915: Pass dev_priv to ilk_disable_lp_wm()Ville Syrjälä1-1/+1
2019-10-26drm/i915: Extract GT render power state managementAndi Shyti1-22/+0
2019-10-24drm/i915: Eliminate skl_check_pipe_max_pixel_rate()Ville Syrjälä1-2/+0
2019-09-27drm/i915: Extract GT render sleep (rc6) managementAndi Shyti1-3/+0
2019-07-01drm/i915: Convert most of atomic commit to take more intel stateMaarten Lankhorst1-2/+2
2019-06-10drm/i915: move pm related declarations to intel_pm.hJani Nikula1-0/+9
2019-04-30drm/i915: move some leftovers to intel_pm.h from i915_drv.hJani Nikula1-0/+10
2019-04-08drm/i915: extract intel_pm.h from intel_drv.hJani Nikula1-0/+71
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.