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author | Vandita Kulkarni <vandita.kulkarni@intel.com> | 2021-05-18 17:06:17 -0700 |
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committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-05-19 23:59:23 -0700 |
commit | f4dc008632260d981c2afc6d72a0a31ca4c7191c (patch) | |
tree | 02ca9ec0bef9b5b52fb484c59fc6c801c702f810 /drivers/gpu/drm/i915/intel_pm.h | |
parent | drm/i915: Introduce MBUS relative dbuf offsets (diff) | |
download | linux-dev-f4dc008632260d981c2afc6d72a0a31ca4c7191c.tar.xz linux-dev-f4dc008632260d981c2afc6d72a0a31ca4c7191c.zip |
drm/i915/adl_p: MBUS programming
Update MBUS_CTL register if the 2 mbus can be joined as per the current
DDB allocation and active pipes, also update hashing mode and pipe
select bits as per the sequence mentioned in the bspec.
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-10-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h index 669c8d505677..bac72c859a84 100644 --- a/drivers/gpu/drm/i915/intel_pm.h +++ b/drivers/gpu/drm/i915/intel_pm.h @@ -78,9 +78,9 @@ struct intel_dbuf_state { struct skl_ddb_entry ddb[I915_MAX_PIPES]; unsigned int weight[I915_MAX_PIPES]; u8 slices[I915_MAX_PIPES]; - u8 enabled_slices; u8 active_pipes; + bool joined_mbus; }; int intel_dbuf_init(struct drm_i915_private *dev_priv); |