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authorMiquel Raynal <miquel.raynal@bootlin.com>2021-05-27 10:45:48 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2021-06-18 09:44:57 +0200
commitcf67edce22c5d7edc6cad64dbeb1d5d7d0099837 (patch)
treee1793ee291fe9ef4eca9b2bba321d494a5cb6615 /drivers/mtd
parentmtd: spinand: Fix double counting of ECC stats (diff)
downloadlinux-dev-cf67edce22c5d7edc6cad64dbeb1d5d7d0099837.tar.xz
linux-dev-cf67edce22c5d7edc6cad64dbeb1d5d7d0099837.zip
mtd: rawnand: arasan: Use the right DMA mask
Xilinx ZynqMP SoC and the Arasan controller support 64-bit DMA addressing. Define the right mask otherwise the default is 32 and some accesses may overflow the default mask. Reported-by: Jorge Courett <jorge.courett@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Jorge Courett <jorge.courett@gmail.com> Link: https://lore.kernel.org/linux-mtd/20210527084548.208429-1-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/arasan-nand-controller.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c
index 97e5a336a760..f9b5b140720b 100644
--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
+++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
@@ -1398,6 +1398,10 @@ static int anfc_probe(struct platform_device *pdev)
if (ret)
goto disable_controller_clk;
+ ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
+ if (ret)
+ goto disable_bus_clk;
+
ret = anfc_parse_cs(nfc);
if (ret)
goto disable_bus_clk;