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| author |   Marek Behún <kabel@kernel.org> | 2021-10-28 20:56:55 +0200 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2021-10-29 10:25:31 +0100 |
| commit | 95997723b6402cd6c53e0f9e7ac640ec64eaaff8 (patch) | |
| tree | b5ab5f95d05a73ec25f3250b7079596b93bd7b72 /drivers/pci | |
| parent | PCI: aardvark: Fix return value of MSI domain .alloc() method (diff) | |
| download | linux-dev-95997723b6402cd6c53e0f9e7ac640ec64eaaff8.tar.xz linux-dev-95997723b6402cd6c53e0f9e7ac640ec64eaaff8.zip | |
PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG
The PCIE_MSI_PAYLOAD_REG contains 16-bit MSI number, not only lower
8 bits. Fix reading content of this register and add a comment
describing the access to this register.
Link: https://lore.kernel.org/r/20211028185659.20329-4-kabel@kernel.org
Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/pci-aardvark.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index b45ff2911c80..389ebba1dd9b 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -119,6 +119,7 @@ #define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58) #define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C) #define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C) +#define PCIE_MSI_DATA_MASK GENMASK(15, 0) /* PCIe window configuration */ #define OB_WIN_BASE_ADDR 0x4c00 @@ -1319,8 +1320,12 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) if (!(BIT(msi_idx) & msi_status)) continue; + /* + * msi_idx contains bits [4:0] of the msi_data and msi_data + * contains 16bit MSI interrupt number + */ advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF; + msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; generic_handle_irq(msi_data); } |